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8051 Assembly Language

8051 Assembly Language. ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical and Computer Engineering Tennessee Technological University Spring 1998. Outline. 8051 Programmer’s Model Addressing Modes Data Movement Instructions

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8051 Assembly Language

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  1. 8051 Assembly Language ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical and Computer Engineering Tennessee Technological University Spring 1998

  2. Outline • 8051 Programmer’s Model • Addressing Modes • Data Movement Instructions • Arithmetic Instructions • Logical Instructions • Shift Instructions • Bit Manipulation • Program Control Instructions

  3. 8051 Introduction • 8 bit Data bus, 16 bit Address bus • Many Special Function Registers (SFRs) for control and I/O

  4. 8051 Code Example ORG 440h Dat DB 0FFh ; in Program Memory Wait EQU 35 Myword DW 1234h ;in Program Memory ORG 0 Start: MOV A,#2Ch ; Acc 2C INC R2 ; R2 R2+1 SETB P0.7 ; Port 0 Bit 7 1 ADD A,Wait ; A Acc + M(35) DEC @R0 ; M(R0) M(R0) - 1 LJUMP Finished ; PC Finished Finished : General Format Label: Opcode dest,src ; Comments

  5. 8051 Programmer’s Model (1) Program Memory 7 0 7 0 FFFF FFFF 60 K External • All instructions • Constant Data • (Using MOVC) 64 K External 1000 OR 0FFF 4 K Internal 0000 0000 if EA = HI if EA = LO Data Memory FFFF AND FF SFRs (Using MOVX) 64 K External 80 @R 7F RAM @DPTR 00 Internal 0000 Direct Direct , Register, Reg. Indirect

  6. 8051 Programmer’s Model (2) SFRs 7F SFRs FF * IE Interrupt Enable Ctr 1 A8 Scratch Pad Area * B F0 * P2 Port 2 A0 SBUF Serial Data Buffer * ACC 99 E0 RAM 98 * SCON Serial Control * PSW D0 90 * P1 Port 1 8D * TH1 timer 1 High * IP B8 8C * TH0 timer 0 High 30 8B * TL1 timer 1 Low Bit #00 7F OR 8A * TL0 timer 0 Low * P3 B0 Bit Addressable RAM 20.0 2F.7 89 TMOD timer/counter Mode 88 * TCEN timer/counter control 20 R7 87 PCON Power Control Bank 3 Select Bank with PSW.4 , .3 = RS1, RS0 18 R0 R7 Bank 2 83 DPH Data pointer DPTR 10 R0 82 DPL R7 Bank 1 81 SP Stack pointer 08 R0 80 * P0 Port 0 R7 Bank 0 00 R0 * = Bit Addressable

  7. 8051 Addressing Modes (1) • Immediate - # Label or Number MOV R6,#14 ; R6 14 10 MOV A,#0CAh ; Acc CA 16 MOV DPTR,#loc ; DPTR value of symbol “loc” • Direct - Label or Number MOV PSW,R5 ; M(PSW) R5 MOV A,045h ; Acc M(45 10) • Register - Rn MOV R1,A ; R1 Acc MOV B,R3 ; B R3

  8. 8051 Addressing Modes (2) • Register Indirect - @R0, @R1, @DPTR MOV @R0,#250 ; M(R0) 250 10 MOV A,@R1 ; A M(R1) MOVX @DPTR,A ; External data M(DPTR) A • Register Indirect Indexed - @A+DPTR, @A+PC MOVC A,@A+DPTR ; A ROM(A+DPTR) MOVC A,@A+PC ; A ROM(A+PC) JMP @A+DPTR ; PC (A+DPTR) • Bit - bit number or label.bit or bit label MOV C,IE.0 ; cy bit 0 of IE reg (EX0) MOV C,EX0 ; same SETB 07Fh ; Bit 7F 1 SETB 2F.7 ; same

  9. 8051 Instructions • Instruction Classes • Data Movement • Arithmetic • Logical • Shift • Bit Manipulation • Program Control

  10. 8051 Data Movement - 1 • MOVE • MOV A, # A Immediate • D A Direct R A Register • @R A Register Indirect MOV R, # Rn D A MOV D, # Direct D R @R A MOV @R, # Register Indirect D A

  11. 8051 Data Movement - 2 • Move From Program Memory • MOVC A, @A+DPTR Acc Rom(A+DPTR) • A, @A+PC Acc Rom(A+PC) • Move External Data RAM MOVX A, @R A, @DPTR MOVX @R, A @DPTR, A • Others • PUSH D SP SP+1, m(SP) D • POP D D m(SP), SP SP - 1 • XCH A, R SWAP Acc Rn • D • @R

  12. 8051 Arithmetic - 1 • Add/Subtract • ADD A, # Acc A+Immediate • D R • @R ADDC A, # Acc A+Immediate+Carry D R @R SUBB A, # Acc Acc-Immediate-Carry D R @R

  13. 8051 Arithmetic - 2 • Inc/Dec • INC A Acc Acc+1 • D R • @R DEC A Acc Acc-1 D R @R • Mul/Div • MUL AB B:A Acc * B (unsigned) • DIV AB A Quo ( A/B ) (unsigned) B Rem( A/B )

  14. 8051 Logical • AND,OR,XOR • AND A, # • ORL D XRL R • @R • D, A • D, # • Other CLR A Acc 0 CPL A Acc Acc SWAP A Acc(7-4) Acc(3-0)

  15. 8051 Shift • Rotates • RL A • RLC A • RR A • RRC A 7 0 Acc 7 0 C Acc 7 0 Acc 7 0 Acc C

  16. 8051 Bit Manipulation - 1 • Clear/Set/Complement • CLR C Carry 0 • bit bit 0 SETB C • bit • CPL C • bit • And, Or, Move • ANL C, bit Carry Carry AND bit • C, /bit Carry Carry AND bit ORL C, bit • C, /bit • MOV C, bit • bit, C

  17. 8051 Bit Manipulation - 2 • Jump • JC label Jump if Carry set • JNC label Jump if Carry clear JB bit, label Jump if bit set JNB bit, label Jump if bit clear JBC bit, label Jump if bit set, then clear bit • label = PC relative (+ 127)

  18. 8051 Program Control - 1 • Jump • AJMP label-A Absolute Jump- 11 bits(2K) • LJMP label-L Long Jump - 16 bits (64K) SJMP label Short Jump • JMP @A+DPTR Jump Indirect PC (A+DPTR) JZ label Jump if zero • JNZ label Jump if not zero • Compare and Jump • CJNE A, #, label Compare 1st op to 2nd op and • A, D, label jump to label if not Equal • R, #, label • @R,#, label

  19. 8051 Program Control - 2 • Decrement and Jump • DJNZ R, label Rn = Rn-1 , Jump if not zero • D, label • Subroutines • ACALL label-A Absolute Call - 11 bits (2K) • LCALL label-L Long Call - 16 bits (64K) • RET Return from Subroutine • RETI Return from ISR • PC m(SP), SP SP-2

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