CMS Upgrades

1. DRAFT_V2 CMS Upgrades LHCC March 20, 2012 Didier Contardo, Jeff Spalding • Upgrade Organization • Brief Update for LS1 Projects • LHC Performance and CMS Strategy • TDR Preparations and Project Highlights • Towards Phase 2 / LS3

2. CMS Upgrade Organization Consolidation and Upgrades LS1… TDR Projects Phase 2 Physics Coordination DPC: Chris Hill Tech. Coordination DTC: Wolfram Zeuner Upgrade Project Office Project managers: Didier Contardo, Jeff Spalding Trigger Performance and Strategy Working Group Cross-organization Representatives Track Trigger Task Force M. Mannelli Two WGs being formed to develop long-range strategies for the CMS Upgrade Program Phase II Forward Detector Working Group Forward Calorimetry Task Force B. Cox, R Ruchti Pixel Detector R. Horisberger CSC D. Loveless Silicon Tracker D. Abbaneo DT C. Fernandez Bedoya ECAL E. Auffray, S. Singovski RPC G. Iaselli HCAL D. Baden, C. Tully BRM A. Dabrowski, D. Stickland L1 Trigger A. Tapper Infrastructure and Common Projects: W. Zeuner DAQ A. Racz

3. Upgrade Organization • Brief Update for LS1 Projects • LHC Performance and CMS Strategy • TDR Preparations and Project Highlights • Towards Phase 2 / LS3 CMS Upgrades Planning for LS1 • Detailed schedule for LS1 work maintained by Technical Coordination • In the process of linking-in the project milestones • Workshops planned for May and September

4. HF-PMT and HO-HPD/SiPM Replacement • HF-PMT • >50% of 1800 HF-PMTs received and tested • P5 results confirm expected performance (8 new PMTs operated in 2011) • In-situ operation of one full Readout Box (24 new PMTs) in 2012 • HO-SiPM • AllSiPMs delivered and characterized by batch • System tests of preproduction FE electronics (including test beam) – full board production and QC underway • Relies on extraction and retrofit of Readout Boxes during LS1  build test-stand factory this summer (A) benefit from thinner window and metal sides in new PMT (B) multi-channel (needs Phase1 electronics)

5. LS1 Muon Upgrades Trigger performance: significantly lower threshold for same rate CSC and RPC: ME4/2 (1.25<⎢η⎢<1.8) More hits, lower rates CSC: M1/1 (2.1<⎢η⎢<2.4) new digital boards and trigger cards : higher strip granularity Electronics reliability DT: new trigger readout board and relocation of sector collector from UXC55 to USC55 (new optical link) Target Rate 5 kHz

6. Muon Upgrades • ME4: 144 chambers + spares, CSC and RPC each RPC • 3 sites CERN, Gent, Mumbai. Total capacity = 18/mo • First batch of Bakelite sheets had a cleaning problem, now resolved (worn cleaning roller at vendor) • Expect first few chambers at each site by August CSC • Two initial pre-production chambers fabricated, one has completed a 2mo long-term HV test. DT • Electronics upgrade • Trigger Readout Board in UXC55 • Move sector collector: Reviewing relocation plan and fiber installation RPC CSC assembly in B904 • Next: Additional pre-production with first batch of production panels from new vendor (just shipped to Fermilab)

7. Upgrade Organization • Brief Update for LS1 Projects • LHC Performance and CMS Strategy • TDR Preparations and Project Highlights • Towards Phase 2 / LS3 CMS Upgrades Following Chamonix 2012 • The outcome of MD studies in 2012 and injector work in LS1 are needed to better predict performance prior to LS2 • Major upgrades in the Injector Chain largely target LS2 (possibly LS1.5) • Performance will very likely exceed design luminosity/pile-up (when?) • Developing a strategy for CMS upgrades which can adapt to the accelerator performance

8. Improvement Steps in Injector Chain From H Damerau: talk on LHC Injectors Upgrade at Chamonix 2012 PSB H- injection ready for installation PSB-PS transfer 1.4 GeV 2 GeV Possible connection of Linac4 w/ H- (LS1.5 = YETS + 2-3mo) Linac4 ready, p+ from Linac4 Study batch compression in PS 2012 MD: 25ns operation in LHC Chamonix 2012 PSB-PS 1.42GeV RF upgrades in PS and SPS Possible aC coating SPS Coupled-bunch Feedback PS Scrubbing in the SPS Prior to LHC startup LS1 for injectors LS2 for injectors 2012 2013 2014 2015 2016 2017 2018 2019 1.4 GeV 2GeV Possible Linac4 w/H- LIU complete Batch compression SPS scrubbed Linac4 deliver- ing H- into PSB if connected in LS2 LS1.5? New coupled-bunch feedback PS What can we expect for LHC • LHC likely able to operate >2E34 before LS3 • Prior to LS2: batch compression, SPS scrubbing… could approach 2E34 • 25ns is baseline plan. Many issues easier at 50ns • Lumi-leveling will be developed, but SEE and UFO induced beam-dumps will continue to limit fill length Werner Herr: https://indico.cern.ch/getFile.py/access?contribId=44&sessionId=6&resId=0&materialId=paper&confId=164089

9. Developing Upgrade Strategy for CMS • Expect step-wise increase in luminosity with improvements in injector chain • Assume 25ns operation, or lumi-leveling at 50ns as a fall-back • Strategy must be able to adapt to new information (after LS1) Strategy for Phase 1 under discussion • Simulate/design for <PU>=50 “baseline” • Study performance degradation for <PU>=100 • Use LS1 for preparatory work to allow efficient progress between LS1 and LS2 Pixel • Install new beam-pipe in LS1 to facilitate future pixel upgrade • Pixel detector technical-driven schedule ready by late-2016, and can install in 5mo stop HCAL • Backend electronics needed ahead of Frontend replacement to support commissioning • HF FE could be upgraded in same 5mo, HB and HE in LS2 L1-Trigger • Provide parallel inputs to the present and new trigger for a development slice after LS1  grow to commissioning of new trigger in parallel

10. Upgrade Organization • Brief Update for LS1 Projects • LHC Performance and CMS Strategy • TDR Preparations and Project Highlights • Towards Phase 2 / LS3 CMS Upgrades Three TDRs • Internal reviews of the projects in the next 3 months • Goal: internal draft documents for Pixel and HCAL in June and for L1-Trigger by end of 2012 • We expect to send documents for Pixel and HCAL to LHCC for September meeting

11. Pixel Technical Highlights • Present detector designed for 1E34/25ns. At 2E34/25 ns or 1E34/50ns, ~16% data loss in innermost layer due to full buffers in readout chips • Tracking performance degrades at high PU (3 layers) FPIX Disk • Features of New Design • Robust design with 4 barrel layers and 3 endcap disks at each end. • Smaller inner radius with new beampipe. • New readout chip with expanded buffers, embedded digitization and high speed data link. BPIX Layout • Reduced mass with 2-phase CO2 cooling and displaced optical transceivers • Powering using DC-DC converters New 43.4mm ID beampipe allows 12-facet inner layer Prototype DC-DC converter with AMIS2 ASIC

12. Pixel Technical Highlights • ROCTwo step development • 2011/12:‘PSI-46dig’ • Bigger buffers • Digital readout: 8bit ADC160MHz • Other improvements, 5 metal layers to 6 • 2012/13: next generation • Deeper re-design, touching also column-drain architecture USC55 UXC55 CO2 CoolingSystem Concept at P5 and plans for full prototype system at TIF 3 1 2

13. Pixel Simulations Efficiency Fake rate 50 PU • Tracking efficiency and b-tagging studies • Adaptation of current tracking code for current and new geometry • Simulation of data-loss due to ROC: 16%(50%) in layer 1 with present ROC at <PU>=50(100). New ROC will be ~few% • Physics performance being studied in simulated ZH mmbb • Almost ready for MC production, and upgrade reconstruction code available in standard release for wider use • Physics Analysis Groups plan to expand studies to other channels (SUSY: 3rd generation - stops, sbottoms) h Current and new geometry, but current inner radius Pt Current New 50 PU

14. HCAL • Backgrounds in HF  multi-channel readout and TDC • HPDs in HB and HE: old issue – discharge in magnetic field (operate at low gain), and new issue – response changing with time • At end of 2011 • ~10% of HPDs • >10% change • Features of New Design • PhotodetectorSiPMs: compact, greatly improved S/N, and B-field immune Channels within one HPD, operation over 2 years • Depth segmentation in HB and HE: backgrounds, isolation and radiation damage compensation (HE) • Rising and falling edge timing (especially important for HF) • ~3-fold increase in data volume  GBT and new BE electronics Extensive test beam studies. Optimization of FE package and DAQ suggests 4 SiPM layers in HB, readout as 3-depths

15. HCAL • SiPM studies • Recent test beam focus: • Hamamatsu, Ketek devices. • Next versions expected to be [pre-]production grade • Simulation • Full simulation with depth segmentation, TDC. Reco code is in standard release. • Physics performance studies beginning: VBF tagging jets (+ MET), stops in l+jets, di-photon + MET in SUSY Jet backgrounds for isolated electrons • Electronics • Proto QIE10 under test (joint development Atlas tile calorimeter). Next gen with TDC. • Prototype ASICs for GBTX MOSIS submission next month • Prototype mTCA boards and software  a test system for the BE electronics

16. L1-Trigger • Series of meetings to review each part of the project • Muon trigger systems. CSC - new muon port (mezzanine) card removes bandwidth bottleneck, DT – new DTTF improves maintainability and performance • Software requirements. Reviewing “lessons learned” and developing requirements. • Looking at common hardware solutions (standard FPGA boards used for several functions) • Developing mTCA standards across CMS (communications, controls and hardware solutions). • Calorimeter trigger system. Two architectures under study. Next step – consider algorithm implementation, timing … • Global trigger system and TTC. Increase capability and flexibility with large FPGAs. Consolidate electronics. • Algorithm and performance studies. Just starting. Example trigger menus for high PU. Object level performance studies, and specific physics channels Calorimeter Trigger System conventional regional approach and time multiplexed

17. L1-Trigger • trigger rate in high-PU Fill: <PU>~30 • Trigger Studies • Rate studies versus PU • Trigger tables in place for up to 6E33 at 50ns (PU>30) • Studying new algorithms with improved granularity • Will extend studies: new algorithmsemployinghigherprecision(invariant mass, ΔR, Ptrel), andpile-up mitigation • Physicsstudiesplanned (VBF, taus in 3rd generation SUSY) Current trigger granularity Algos for upgraded trigger, higher granularity • Developing plan for preparatory work in LS1 • To minimize risk to CMS, need development and commissioning of new trigger in parallel with operation of present L1 • Requires optical splitting for calorimeter and muon signals • Goal: Install a slice in LS1, and pre-work to allow the parallelism to grow to allow complete L1 trigger upgrade prior to LS2

18. Upgrade Organization • Brief Update for LS1 Projects • LHC Performance and CMS Strategy • TDR Preparations and Project Highlights • Towards Phase 2 / LS3 CMS Upgrades Towards Phase 2 • Ongoing: • Silicon Tracker/Trigger: Conceptual design and R&D • ECAL studies: Performance degradation at high radiation and pile-up • Muon systems: Study longevity, and R&D on new detectors • Forward Calorimetry Task Force: Studies and R&D for calorimetry in the endcap and forward regions (EE and HE) • New Working groups: develop physics and object-driven requirements, and develop long-term strategies • 2012-13: Physics-driven understanding of detector characteristics needed • R&D and studies to develop concepts • ~2014: Develop a Technical Proposal for the Phase 2 Upgrades

19. Phase 2 Tracker and Track Trigger The Phase 2 Project • Develop design concept for a full tracker upgrade to produce tracking primitives for L1-trigger. Two complimentary configurations ready for performance simulation • R&D • Advanced sensors • lab tests, irradiation, simulation • goal to select sensor technology by end 2013, then move to prototyping • Cooling, Power • build on developments for Phase 1 Pixels • Advanced module mechanics and packaging for onboard electronics • goal to develop first prototype in 2012 • HL-LHC: Luminosity–leveled at 5E34, delivering a total of 300fb-1 • Emphasis on tracking and triggering at PU>>100 and very high radiation levels General Concept “stub” y z PT Module Concepts: strip-strip, pixel-strip x strip-strip • Low-power version of the GigaBit Transceiver: LP-GBT • evolution of present GBT development

20. ECAL, and Forward Calorimetry Task Force ECAL • Projections • Phase 1: EB, EE and ES will perform well with some radiation damage effects which can be handled with monitoring and calibration • Phase 2: EB is not expected to degrade significantly, while the performance of EE and ES will be degraded • Program of test beam, irradiation and laboratory tests • 2012: EE crystals exposed at test beam and on Castor Table at P5 • Recovery schemes measured in lab • Simulation and R&D • In conjunction with Forward Calorimetry Task Force Forward Calorimetry Task Force • Simulation studies • Developing calorimetry aging simulation model (including beam test results) • Developing FullSim and flexible FastSim for studies of candidate configurations • R&D progress • Rad hard APD/SiPMphotodetectors in GaAs (prototypes) and SiC (discussions) • Crystals, tiles and radiation-hard fibers for EM and HE

21. Upgrade Costs • The overall cost scale for the Phase 1 upgrade program was established with the Technical Proposal: 65 MCHF materials and services. • Cost tracking for the LS1 projects continues to be very close to these original estimates, and fully funded/resourced. • For the three TDR projects we will update the cost estimates at the time of the TDRs to reflect the significant progress in the designs since the concepts in the Technical Proposal. • Specific work in LS1 to prepare for the upgrades requires early funding. • Funding for the Phase 2 R&D is essential to progress to a Technical Proposal. Schedules • The LS1 projects have detailed schedules and milestones. The LS1 work at P5 has a very detailed schedule. We are linking the two via milestones. • For the three TDR projects we are developing mid-detail schedules and milestones which are currently technically driven. These may be adjusted once funding models are established.

22. Remarks • The CMS upgrades are making good progress on all fronts. • LS1 projects are on track. The LS1 schedule is tight, and detailed planning is essential – workshops in May and September. • The Physics Analysis Groups engaging in simulation studies (brief gap in the conference cycle!) • Pixel and HCAL TDRs are in preparation for the September LHCC meeting • The L1-Trigger TDR will be ~6 months later • We anticipate LHC operation at 2E34 or higher before LS3, and possibly near this by LS2. An extended YETS (aka LS1.5) may be possible • CMS is developing a strategy for the upgrade program that allows CMS to adapt to a change in LHC projections and plans – we expect much more to be known after LS1 startup • Funding for the LS1 projects is in place. We are developing a funding plan for preparatory work in LS1. Phase 2 R&D needs continuing support for progress to a TP.