Lecture 13 Prawat Nagvajara

1. Lecture 13Prawat Nagvajara • Pipeline Schedule • Advantage: smaller latency by introducing pipelining stages thus faster clock rate • Compare to a schedule that implies ripple-carry adder the clock rate is n fold • Same order of hardware, i.e, linear with n • Compare to the array multiplier the latency is the same but the hardware of the array is on the order of n square

2. A Pipeline Mapping Multiplication DG t = 0 t = 1 t = 2 carry b(t) D D D D D D D D D D p(t)

3. Processing Element X_j DFF Y_i Y_out AND DFF C_out Full Adder C_in DFF PS_in PS_out

4. A Pipelined Multiplier a2 a1 a0 0 0 0 0 0 0 0 0 0 • We will do an example of (111) * (111) = (110001)

5. Snapshots at t= 0, 1 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0

6. Snapshots at t= 2, 3 1 1 1 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 1 0 0 0 1 0

7. Snapshots at t= 4, 5 1 1 1 1 0 1 0 0 1 0 0 0 0 0 1 1 1 1 0 0 0 1 1 0 1 0 0 0 0 0

8. Snapshots at t= 6, 7 1 1 1 0 0 1 0 0 1 0 0 0 1 0 0 1 1 1 0 1 0 0 1 0 0 0 0 0 1 0

9. Snapshots at t= 8, 9 1 1 1 0 0 0 0 0 0 0 0 1 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0

10. Snapshot at t= 10 1 1 1 0 0 0 0 0 0 0 0 1 0 0 1

11. The SchedulePartial Sum Computed at T=6 Is an Output at T=8Carry Computed at T=6 Is an Output at T=10 t=0 t=1 t=2 t=3 t=4 t=6 t=5

12. Pipeline Structure • Temporal Parallelism • Schedule that infers delay at edges of the signal flow graph • Pipelining rate (bandwidth): The rate at which the data are piped into the array, e.g., the multiplier example has the rate ½ (every other clock cycle the multiplier bit is applied • Latency: The time it takes to complete an algorithm

13. Is There Other Pipeline Multiplier?