Wear Leveling Techniques for Flash Memory EEPROM Systems

1. Wear Leveling Techniques for Flash Memory EEPROM Systems Flash Memory 2006. 2 Lofgren et al.

2. Contents • Motivation • Background • Wear Leveling Technique • Summary Wear Leveling Techniques for Flash Memory EEPROM Systems

3. 1. Motivation

4. Motivation • flash EEPROM (electrically erasable and programmable read only memory) • Advantage • non-volatility • speed • ease of erasure and reprogramming • small physical size and similar factors • Disadvantage • limited life time(10,000~) • Goal • maximize the service lifetime of an entire mass storage EEPROM system Wear Leveling Techniques for Flash Memory EEPROM Systems

5. Summary of the Invention • EEPROM array of cell • is devided two or more interchangeable banks of cells • bank has one or more blocks of cells • Interchange (wear leveling) • allow for extending overall memory system lifetime • without having to provide such replacement groups of memory cells Wear Leveling Techniques for Flash Memory EEPROM Systems

6. 2. Background

7. General Computer System • include flash EEPROM memory Wear Leveling Techniques for Flash Memory EEPROM Systems

8. Memory Operation Technique Wear Leveling Techniques for Flash Memory EEPROM Systems

9. Logical/Physical Memory Bank Char. & Usage • the total number of blocks of memory with which the computer system is working at the moment • record may be maintained of the number of times that the block was written • a total number of block writing cycles that have been initiated • the total number of cycles experienced by the interchangeable banks • maintain an identification of the banks having the minimum and the maximum number of cycles Wear Leveling Techniques for Flash Memory EEPROM Systems

10. 3. Wear Leveling Technique

11. Wear Leveling Operation • be triggered by that difference exceeding a certain magnitude • when wear leveling is accomplished, • data is transferred between the most heavily used and least used banks • ex) when bank 0 is very larger number of erase and rewrite cycles than bank 1, both can be swapped • the address translation table is updated for bank 1 and bank 0 Wear Leveling Techniques for Flash Memory EEPROM Systems

12. Outline of Wear Leveling System • Memory Controller and EEPROM Banks the memory system address translation table Wear Leveling Techniques for Flash Memory EEPROM Systems

13. The Nature of each Block • a field 73 includes a count of number of time that the block has been erased and rewritten Wear Leveling Techniques for Flash Memory EEPROM Systems

14. The Process Flow Diagram Wear Leveling Techniques for Flash Memory EEPROM Systems

15. Example of Swap Banks spare bank Wear Leveling Techniques for Flash Memory EEPROM Systems

16. Example of Swap Blocks (Cont.) Wear Leveling Techniques for Flash Memory EEPROM Systems

17. Example of Swap Blocks (Cont.) spare bank Wear Leveling Techniques for Flash Memory EEPROM Systems

18. 4. Summary

19. Summary • the header of each erase unit includes an erase counter • spare erase unit • when the difference of counter exceeds a threshold, wear leveling technique swap between the most worn-out unit and the least worn-out unit Wear Leveling Techniques for Flash Memory EEPROM Systems