ARM & Verilog

1. ARM & Verilog Nov 2, 2003 정병수 Benjamin Jung

2. 공부할 내용 • 준비물 • Linux (including CrossGCC for ARM) • Iracus Verilog & Xilinx ISE Software • 공부할 내용 • ARM Architecture • Verilog HDL • 보충 자료 • TAURUS S3C2400 board • ZEUS FPGA board

3. ARM Architecture

4. ARM1 Architects Herman Hauser, Project manager Steve Furber, Architecture design Sophie Wilson, Instruction Set design Robert Heaton, Silicon design Jamie Urquhart, Silicon design Steve FurberUniv. of Manchester sfurber@cs.man.ac.uk Father of ARM

5. ARM History • ARM : Acorn RISC Microprocessor • 1979 Acorn was founded for making computer by Herman Hauser • 1981 Acorn designed computer with the 8bit 6502 for BBC • 1983~1985 (18 months) 5 people designed the microprocessor • 1990 Apple, VLSI Tech., Nippon Inv. and Acron launch ARM Inc. • ARM : Advanced RISC Microprocessor • ARM 사는 CPU 디자인을… • 각 반도체사들은 Chip 디자인을...

6. The History of ARM

7. ARM Pipeline • ARM7 : 3 stage pipeline, ARMv4t instruction • Fetch : Instruction을 읽어온다. • Decode : Instruction을 디코딩한다. • Execute : Instruction을 실행한다. • ARM9 : 5 stage pipeline, ARMv4t instructio • Fetch, Decode, Execute, Memory, WriteBack • ARM10 : 6 stage pipeline, ARMv5t instruction • Fetch, Issue, Decode, Execute, Memory, WriteBack • ARM11 : 8 stage pipeline, ARMv6t instruction • ARM12(?) : multi instruction issue Superscalar

8. Pipeline ARM7 • Fetch • Decode • Execute

9. Registers

10. Instruction Set

11. Instruction Set

12. Program State Register

13. Exception Entry/Exit

14. Exception Entry/Exit

15. Data Processing Instruction

16. Data Processing Instruction

17. Thumb Instruction

18. Thumb Instruction to ARM Instruction

20. AMBA Bus

21. nnARM corewithVerilog HDL

22. nnARM and OpenCores.org nnARM • By ShengYu Shen 2001.6 • Verilog HDL • ARM9 with Thumb (ARMv4T) • No MMU implementation Opencore FPGA Board Damjan Lampert lampert@opencores.org Father of OpenCores.org • Xilinx VertexE XCV800E • PCB Design with Protel EDA

24. HDL (Hardware Description Language) • Verilog HDL • 1984년 Phil Morby에 의해 Verification/Simulation용으로 개발 • C 언어와 유사하고 문장 기술이 간단하고 단순함 • 1995년에 IEEE 1364로 표준화 • 전세계 기업체의 대부분이 사용하는 실질적인 업계 표준 • VHDL • 미국 국방성을 중심으로 1987년에 IEEE 1076으로 표준화 • 기술 방법이 풍부한 동시에 엄격함 • 주로 학계에서 널리 사용됨

25. Verilog • Module : block을 이루는 기본단위 • Port : input, output, inout • Reg/Wire • reg : always 문에서 assign 되는 신호에 사용 • wire : assign문으로 assign 되는 신호에 사용

27. ARM Verilog • Data processing Instruction • SUBS R0, R1, R4 ir[27:26] == 2’b00 && ir[24:21] == 4’b0010 SUB RD, OPA, OPB

28. ARM Verilog • Branch Instruction • L2 B L2 ir[27:25] == 3’b101 B(branch) or BL(branch and link)

29. nnARM • 4 stage PipelineIF : IF.v ID : Decode_ARM.vALU : ALUShell.vMEM : mem.v

30. [보충] TAURUS : 2400 (2410) ZEUS : Xilinx FPGA

31. 흰소, 1962, 53.5x34.4cm종이에 油彩, 호암미술관

33. RS485 9Pin D-SUB RS232 9Pin D-SUB Tau Main-Board SDRAM 64MB NAND Flash 64MB NOR Flash 1MB No Assembly USB USB Port Line Driver UART S3C2400 or S3C2410 Ethernet Xilinx CPLD 9536 ASIX Ethernet AX88796 LCD 3.5 inch TFT LCD LTS500Q1 LWC3600 1.5V AAA Battery x 2 Tau Sub-Board

35. Zeus Main-Board SDRAM 64MB SRAM 2MB NAND Flash 64MB PCI Connector x 2 NOR Flash 1MB VertexII XC2V2000 Video SAA7114 Ethernet LXT970 Reconfigurable CPU Core Local BUS Parallel XC95108 LCD 3.5 inch TFT LCD LTS500Q1 LWC3600 1.5V AAA Battery x 2 Tau Sub-Board