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Startup Code. Lecture L5.2. Reference. MC9S12C Family Device User Guide V01.05. 9S12C128DGV1.pdf. ROMCTL. MODC MODB,MODA. On reset, board comes up in Normal Single Chip mode. Reset Code. >md fff0 FFF0 FB 66 FB 68 FB 6A FB 6C FB 6E FB 70 FB 72 FC 00. >md fc00
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Startup Code Lecture L5.2
Reference MC9S12C Family Device User Guide V01.05 9S12C128DGV1.pdf
ROMCTL MODC MODB,MODA
Reset Code >md fff0 FFF0 FB 66 FB 68 FB 6A FB 6C FB 6E FB 70 FB 72 FC 00 >md fc00 FC00 14 10 4F 08 01 03 06 80 00 CF 0F 8A 79 00 3C 18 14 10 ORCC #$10 ;SEI 4F 08 01 03 BRCLR,PORTE,#$01,NEXT 06 80 00 JMP $8000 CF 0F 8A NEXT LDS #$0F8A --------
MEBI Module Multiplexed External Bus Interface (MEBI) Block User Guide Module V3 S12MEBIV3.pdf
PEAR EQU $000A On reset, board comes up in Normal Single Chip mode Must change to use multiplexed address/data bus
PEAR EQU $000A 0 0
PEAR EQU $000A 0 0 0 1
PEAR EQU $000A 0 0 0 1 1 MOVB #$0C,PEAR
MODE EQU $000B 1 1 1 MOVB #$E0,MODE MOVW #$0CE0,PEAR
Module Mapping Control Module Mapping Control (MMC) V4 S12MMCV4.pdf
MISC EQU $0013 MOVB #$0D,MISC
CRG Block User Guide V04.05 Clocks and Reset Generator (CRG) S12CRGV4.pdf
COPCTL EQU $003C CLR COPCTL
startup.asm ; Start up code COPCTL EQU $003C STACK EQU $0DFF ORG $8000 startup LDS #STACK CLR COPCTL JMP MAIN MAIN
Turnkey Example ; Turnkey SCI Interface using interrupts File: TKSCILCD.WHP ; display characters from PC keyboard on LCD display SC0BDH EQU $C8 ;baud rate control SC0CR1 EQU $CA ;SCI control reg 1 SC0CR2 EQU $CB ;SCI control reg 2 SC0SR1 EQU $CC ;SCI status reg SC0DRL EQU $CF ;SCI data reg RDRF EQU $20 ;SCSR mask SCI0.IVEC EQU $0FD8 ;SCI0 user vector address + 2 COPCTL EQU $003C ;COP control reg STACK EQU $0DFF ;initial stack pointer
ORG $800 qsize equ 16 front dw 0 rear dw 0 qmin dw 0 qmax dw 0 qbuff rmb qsize ORG $8000 startup LDS #STACK CLR COPCTL main jsr spi_init ;initialize spi jsr lcd_init ;initialize lcd jsr initq ;initialize queue jsr sci0_init ;initialize sci mn1 jsr checkq ;if queue is empty bcs mn1 ; wait jsr data8 ;store char on LCD ldy #300 jsr ms_delay ;delay ~10 ms bra mn1 Note: No initial values can be here
S0030000FC S113080000000000000000000000000000000000E4 S10B08100000000000000000DC S1138000CF0DFF79003C1680B816812716804516DF S1138010802216808725FB16811CCD012C1680D961 S113802020F014107900CACC00345CC8862C5ACBDA S1138030CC80397C0FD810EF3D96CC842027059650 S1138040CF1680580BCC08087C08007C08027C08FA S113805004C3000F7C08063D36FC0802C30001BCC3 S113806008062303FC08047C0802BC0800261183CC S11380700001BC08042403FC08067C080232200624 S113808032FE08026A003DFC0800BC080226041403 S1138090012018FC0800C30001BC08062303FC08E7 S11380A0047C0800FE0800A60010FE3D840F810930 S11380B023038B373D8B303D86105AD97900DA86FD S11380C0525AD83D3696DB842027FA32365ADD964A S11380D0DB848027FA96DD323D34CE07CF0926FDB6 S11380E00326F7303D36840F1680C4368A80168006 S11380F0C4321680C4323D364444444407E7320750 S1138100E43D36840F368A401680C432368AC0165F S113811080C432368A401680C432323D36444444E8 S11381204407DF3207DC3DCD00321680D9860316C2 S113813080E5CD00321680D986031680E5CD003265 S11381401680D986031680E5CD00321680D98602C2 S11381501680E5CD00321680D9862C1680F7CD0026 S11381600A1680D986061680F7CD000A1680D986AD S11381700F1680F7CD000A1680D986011680F7CD38 S113818000141680D986801680F7CD000A1680D98F S113819086001680C43D86011680F7CD000A16803D S11381A0D93D1680AC16811C3DA630270B16811CC8 S10C81B0CD000A1680D920F13D2E S9030000FC Note: Must delete these two lines before programming to flash memory tkscilcd.s19