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Los tOHMales CalI e ntes. Lauren Cash, Chuhong Duan Rebecca Reed, Andrew Tyler. ECE 4332: Intro to VLSI. Introduction. ECE 4332: Intro to VLSI. Project: Design a high-speed 64KB SRAM cache Make optimizations that influence p ower c onsumption, area and total delay Metric:
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Los tOHMalesCalIentes Lauren Cash, ChuhongDuan Rebecca Reed, Andrew Tyler ECE 4332: Intro to VLSI
Introduction ECE 4332: Intro to VLSI
Project: • Design a high-speed 64KB SRAM cache • Make optimizations that influence power consumption, area and total delay • Metric: Delay^2*access-energy*idle-power*area ECE 4332: Intro to VLSI
Overview ECE 4332: Intro to VLSI
Sized standard 6T Bit Cell • Row decoder: predecode stage (4-16) • Column deMUX: precode stage (3-8, 2-4) • PreCharge/BL/BLB • High Speed Sense Amp • Column MUX for output data Components Figure : Simple SRAM 6T Bit Cell (U.Va ECE wiki) Figure : Hierarchical decoders ECE 4332: Intro to VLSI
The Simulations ECE 4332: Intro to VLSI
Simulations ECE 4332: Intro to VLSI
Process Corners - FF ECE 4332: Intro to VLSI
Process Corners - FS ECE 4332: Intro to VLSI
Process Corners - SF ECE 4332: Intro to VLSI
Process Corners - SS ECE 4332: Intro to VLSI
Layout ECE 4332: Intro to VLSI
Single Bit cell Figure : Los tOHMalesCalientes, Bit Cell Layout ECE 4332: Intro to VLSI
High Speed Sense Amp Figure : Los tOHMalesCalientes, Bit Cell Layout ECE 4332: Intro to VLSI
Pre-charge Layout Figure : Los tOHMalesCalientes, Pre-charge Layout ECE 4332: Intro to VLSI
32x1 Mux Figure : Los tOHMalesCalientes, 32x1 Mux ECE 4332: Intro to VLSI
Pre-Decoder Figure : Los tOHMalesCalientes, Pre-Decoder Layout ECE 4332: Intro to VLSI
Row Decoder Figure : Los tOHMalesCalientes, Row Decoder ECE 4332: Intro to VLSI
Full Layout Figure : Los tOHMalesCalientes, Full Layout ECE 4332: Intro to VLSI
Optimizations ECE 4332: Intro to VLSI
High speed Sense Amp architecture • BL/BLB/PRECH Logic • Pre-decoder logic • Decoder location • Square cache architecture • Write drive size ECE 4332: Intro to VLSI
High Speed Sense Amp • Speeded up ~50% Figure. High Speed Sense Amp for Cache Application (Hsu, Ho, (2004)) ECE 4332: Intro to VLSI
Write Driver Size Figure. Write delay vs. BL driver size ECE 4332: Intro to VLSI
Metrics ECE 4332: Intro to VLSI
References Hsu, C.-L., & Ho, M.-H. (2004). High-speed sense amplifier for SRAM applications. The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings (Vol. 1, pp. 577 – 580 vol.1). Presented at the The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. doi:10.1109/APCCAS.2004.1412828 ECE 4332: Intro to VLSI