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IFIP Working Group 10.5

IFIP Working Group 10.5 . DAC 2013 - Austin Convention Center Monday June 3, 18:00-20:00 Room # 5a. AGENDA. Welcome Status of preparation of VLSI- SoC 2013 (Luis Miguel Silveira) Status of SBCCI 2013 (Ricardo Reis) Summary of Grenoble meeting and approval of minutes

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IFIP Working Group 10.5

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  1. IFIP Working Group 10.5 DAC 2013 - Austin Convention Center MondayJune 3, 18:00-20:00 Room # 5a

  2. AGENDA • Welcome • Status of preparation of VLSI-SoC 2013 (Luis Miguel Silveira) • Status of SBCCI 2013 (Ricardo Reis) • Summary of Grenoble meeting and approval of minutes • Status of the VLSI-SoC 2012 book (Matthew Guthaus) • Status of FDL 2013 • AOB

  3. Welcome • Presence and apologies • Expected:David Atienza, Dominique Borrione,AyseCoskun, Nikil Dutt, Matthew Guthaus, Hillel Ofek, Ricardo Reis, Luis Miguel Silveira, Eugenio Villar • Apologies: Juergen Becker, Kiyoung Choi, Luc Claesen, Manfred Glesner, ReinerHartenstein, Michael Hübner, Masaharu Imai, TakashiKambe, Tiziana Margaria, Klaus Mueller-Glaser, Ian O'Connor, Adam Pawlak, Franz Rammig, Flávio Wagner, Wolfgang Rosenstiel, Leandro Soares Indrusiak, DimitriosSoudris, P.A.Subrahmanyam, Lionel Torres • Invited: Srinivas Katkoori (proposed for membership), Achim Rettberg

  4. Status of FDL 2013 • September 24-26, 2013 Paris, France • General Chair: Marie-Minerve Louërat, UPMC LIP6 • General Co-Chair: Torsten Maehne, UPMC LIP6 • 4 Tracks: • Applications of FormalMethods for Specification, Verification and Debug • Digital HW/SW Embedded Systems • Embedded Analog and Mixed-Signal System Design • Model-Driven Engineering for Embedded Systems Design and Development

  5. Status of FDL 2013 • Submissions deadline 12 May 2013 extended to 22 May • 50 scientificcontributions (4 tracks) • Specialindustrial sessions • Reviewprocess on-going • PC meeting in ParisJune 17th. • http://www.ecsi.org/fdl

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