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Chapter 2

Chapter 2. Instructions: Language of the Computer. Instruction Set. §2.1 Introduction. The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers had very simple instruction sets Simplified implementation

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Chapter 2

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  1. Chapter 2 Instructions: Language of the Computer

  2. Instruction Set §2.1 Introduction • The repertoire of instructions of a computer • Different computers have different instruction sets • But with many aspects in common • Early computers had very simple instruction sets • Simplified implementation • Many modern computers also have simple instruction sets Chapter 2 — Instructions: Language of the Computer — 2

  3. The ARM Instruction Set • Used as the example in chapters 2 and 3 • Most popular 32-bit instruction set in the world (www.arm.com) • 4 Billion shipped in 2008 • Large share of embedded core market • Applications include mobile phones, consumer electronics, network/storage equipment, cameras, printers, … • Typical of many modern RISC ISAs • See ARM Assembler instructions, their encoding and instruction cycle timings in appendixes B1,B2 and B3 (CD-ROM) Chapter 2 — Instructions: Language of the Computer — 3

  4. Arithmetic Operations • Add and subtract, three operands • Two sources and one destination ADD a, b, c ; a gets b + c • All arithmetic operations have this form • Design Principle 1: Simplicity favours regularity • Regularity makes implementation simpler • Simplicity enables higher performance at lower cost §2.2 Operations of the Computer Hardware Chapter 2 — Instructions: Language of the Computer — 4

  5. Arithmetic Example • C code: f = (g + h) - (i + j); • Compiled ARM code: ADD t0, g, h ; temp t0 = g + hADD t1, i, j ; temp t1 = i + jSUB f, t0, t1 ; f = t0 - t1 Chapter 2 — Instructions: Language of the Computer — 5

  6. Register Operands • Arithmetic instructions use registeroperands • ARM has a 16 × 32-bit register file • Use for frequently accessed data • Registers numbered 0 to 15 (r0 to r15) • 32-bit data called a “word” • Design Principle 2: Smaller is faster • c.f. main memory: millions of locations §2.3 Operands of the Computer Hardware Chapter 2 — Instructions: Language of the Computer — 6

  7. Register Operand Example • C code: f = (g + h) - (i + j); • f, …, j in registers r0, …,r4 • r5 and r6 are temporary registers • Compiled ARM code: ADD r5,r0,r1 ;register r5 contains g + h ADD r6,r2,r3 ;register r6 contains i + j SUB r4,r5,r6 ;r4 gets r5-r6 Chapter 2 — Instructions: Language of the Computer — 7

  8. Memory Operands • Main memory used for composite data • Arrays, structures, dynamic data • To apply arithmetic operations • Load values from memory into registers • Store result from register to memory • Memory is byte addressed • Each address identifies an 8-bit byte • Words are aligned in memory • Address must be a multiple of 4 • ARM is Little Endian • Least-significant byte at least address • c.f. Big Endian: Most-significant byte at least address of a word Chapter 2 — Instructions: Language of the Computer — 8

  9. Memory Operand Example 1 • C code: g = h + A[8]; • g in r1, h in r2, base address of A in r3 • r5 is temporary register • Compiled ARM code: • Index 8 requires offset of 32 • 4 bytes per word LDR r5,[r3,#32] ; reg r5 gets A[8]ADD r1, r2, r5 ; g = h + A[8] base register offset Chapter 2 — Instructions: Language of the Computer — 9

  10. Memory Operand Example 2 • C code: A[12] = h + A[8]; • h in r2, base address of A in r3 • r5 is temporary register • Compiled ARM code: • Index 8 requires offset of 32 LDR r5,[r3,#32] ; reg r5 gets A[8]ADD r5, r2, r5 ; reg r5 gets h+A[8] STR r5,[r3,#48] ; Stores h+A[8]into A[12] Chapter 2 — Instructions: Language of the Computer — 10

  11. Registers vs. Memory • Registers are faster to access than memory • Operating on memory data requires loads and stores • More instructions to be executed • Compiler must use registers for variables as much as possible • Only spill to memory for less frequently used variables • Register optimization is important! Chapter 2 — Instructions: Language of the Computer — 11

  12. Immediate Operands • Constant data specified in an instruction ADD r3,r3,#4 ; r3 = r3 + 4 • Design Principle 3: Make the common case fast • Small constants are common • Immediate operand avoids a load instruction Chapter 2 — Instructions: Language of the Computer — 12

  13. Unsigned Binary Integers • Given an n-bit number §2.4 Signed and Unsigned Numbers • Range: 0 to +2n – 1 • Example • 0000 0000 0000 0000 0000 0000 0000 10112= 0 + … + 1×23 + 0×22 +1×21 +1×20= 0 + … + 8 + 0 + 2 + 1 = 1110 • Using 32 bits • 0 to +4,294,967,295 Chapter 2 — Instructions: Language of the Computer — 13

  14. 2s-Complement Signed Integers • Given an n-bit number • Range: –2n – 1 to +2n – 1 – 1 • Example • 1111 1111 1111 1111 1111 1111 1111 11002= –1×231 + 1×230 + … + 1×22 +0×21 +0×20= –2,147,483,648 + 2,147,483,644 = –410 • Using 32 bits • –2,147,483,648 to +2,147,483,647 Chapter 2 — Instructions: Language of the Computer — 14

  15. 2s-Complement Signed Integers • Bit 31 is sign bit • 1 for negative numbers • 0 for non-negative numbers • –(–2n – 1) can’t be represented • Non-negative numbers have the same unsigned and 2s-complement representation • Some specific numbers • 0: 0000 0000 … 0000 • –1: 1111 1111 … 1111 • Most-negative: 1000 0000 … 0000 • Most-positive: 0111 1111 … 1111 Chapter 2 — Instructions: Language of the Computer — 15

  16. Signed Negation • Complement and add 1 • Complement means 1 → 0, 0 → 1 • Example: negate +2 • +2 = 0000 0000 … 00102 • –2 = 1111 1111 … 11012 + 1 = 1111 1111 … 11102 Chapter 2 — Instructions: Language of the Computer — 16

  17. Sign Extension • Representing a number using more bits • Preserve the numeric value • In ARM instruction set • LDRSB,LDRSH: extend loaded byte/halfword • Replicate the sign bit to the left • c.f. unsigned values: extend with 0s • Examples: 8-bit to 16-bit • +2: 0000 0010 => 0000 00000000 0010 • –2: 1111 1110 => 1111 11111111 1110 Chapter 2 — Instructions: Language of the Computer — 17

  18. Representing Instructions • Instructions are encoded in binary • Called machine code • ARM instructions • Encoded as 32-bit instruction words • Small number of formats encoding operation code (opcode), register numbers, … • Regularity! • Register numbers – r0 to r15 §2.5 Representing Instructions in the Computer Chapter 2 — Instructions: Language of the Computer — 18

  19. Cond F I Opcode S Rn Rd Operand2 4 bits 2 bits 1 bits 4 bits 1 bits 4 bits 4 bits 12 bits ARM Data Processing (DP) Instructions • Instruction fields • Opcode : Basic operation of the instruction • Rd: The destination register operand • Rn: The first register source operand • Operand2: The second source operand • I:Immediate. If I is 0, the second source operand is a register, else the second source is a 12-bit immediate. • S: Set Condition Code • Cond: Condition • F: Instruction Format. Chapter 2 — Instructions: Language of the Computer — 19

  20. Cond 14 0 F I 0 Opcode 4 S 0 Rn 1 Rd 5 Operand2 2 4 bits 4 bits 2 bits 2 bits 1 bits 1 bits 4 bits 4 bits 1 bits 1 bits 4 bits 4 bits 4 bits 4 bits 12 bits 12 bits DP Instruction Example ADD r5,r1,r2 ; r5 = r1 + r2 111000001000000101010000000000102 Chapter 2 — Instructions: Language of the Computer — 20

  21. Hexadecimal • Base 16 • Compact representation of bit strings • 4 bits per hex digit • Example: eca8 6420 • 1110 1100 1010 1000 0110 0100 0010 0000 Chapter 2 — Instructions: Language of the Computer — 21

  22. Cond Cond 14 F 1 F I Opcode 24 Opcode 3 Rn S Rn 5 Rd Rd 32 Offset12 Operand2 4 bits 4 bits 2 bits 2 bits 6 bits 6 bits 4 bits 4 bits 4 bits 4 bits 12 bits 12 bits 4 bits 2 bits 1 bits 4 bits 1 bits 4 bits 4 bits 12 bits ARM Data Transfer (DT) Instruction • Design Principle 4: Good design demands good compromises • Different formats complicate decoding, but allow 32-bit instructions uniformly • Keep formats as similar as possible LDR r5, [r3, #32] ; Temporary reg r5 gets A[8] Chapter 2 — Instructions: Language of the Computer — 22

  23. Stored Program Computers • Instructions represented in binary, just like data • Instructions and data stored in memory • Programs can operate on programs • e.g., compilers, linkers, … • Binary compatibility allows compiled programs to work on different computers • Standardized ISAs The BIG Picture Chapter 2 — Instructions: Language of the Computer — 23

  24. Logical Operations §2.6 Logical Operations • Instructions for bitwise manipulation • Useful for extracting and inserting groups of bits in a word Chapter 2 — Instructions: Language of the Computer — 24

  25. Cond 000 Opcode S Rn Rd shift_imm 000 Rm 4 bits 3 bits 4 bits 1 bit 4 bits 4 bits 8 bits 3 bits 4 bits Shift Operations • shift_imm: how many positions to shift • Logical shift left (LSL) • Shift left and fill with 0 bits • LSL by i bits multiplies by 2i • rm, LSL #<shift_imm> • ADD r5,r1,r2 LSL #2 ; r5 = r1 + (r2 << 2) • Logical shift right(LSR) • Shift right and fill with 0 bits • LSR by i bits divides by 2i (unsigned only) • rm, LSR #<shift_imm> • MOV r6,r5, LSR # 4 ; r6 = r5 >> 4 Chapter 2 — Instructions: Language of the Computer — 25

  26. AND Operations • Useful to mask bits in a word • Select some bits, clear others to 0 AND r5, r1, r2 ; reg r5 = reg r1 & reg r2 r2 0000 0000 0000 0000 0000 1101 1100 0000 r1 0000 0000 0000 0000 0011 1100 0000 0000 r5 0000 0000 0000 0000 0000 1100 0000 0000 Chapter 2 — Instructions: Language of the Computer — 26

  27. OR Operations • Useful to include bits in a word • Set some bits to 1, leave others unchanged ORR r5, r1, r2 ; reg r5 = reg r1 | reg r2 r2 0000 0000 0000 0000 0000 1101 1100 0000 r1 0000 0000 0000 0000 0011 1100 0000 0000 r5 0000 0000 0000 0000 0011 1101 1100 0000 Chapter 2 — Instructions: Language of the Computer — 27

  28. NOT Operations • Useful to invert bits in a word • Change 0 to 1, and 1 to 0 • ARM has Move Not (MVN) MVN r5, r1 ; reg r5 = ~ reg r1 r1 0000 0000 0000 0000 0011 1100 0000 0000 r5 1111 1111 1111 1111 1100 0011 1111 1111 Chapter 2 — Instructions: Language of the Computer — 28

  29. Conditional Operations • Branch to a labeled instruction if a condition is true • Otherwise, continue sequentially • CMP reg1,reg2 • BEQ L1 • if (reg1 == reg2) branch to instruction labeled L1; • CMP reg1,reg2 • BNE L1 • if (reg1 != reg2) branch to instruction labeled L1; • B exit ; go to exit • unconditional jump to instruction labeled exit §2.7 Instructions for Making Decisions Chapter 2 — Instructions: Language of the Computer — 29

  30. ARM instruction format summary Chapter 2 — Instructions: Language of the Computer — 30

  31. Compiling If Statements • C code: if (i==j) f = g+h;else f = g-h; • f, g, … in r0, r1,..r4 • Compiled ARM code: CMP r3,r4BNE Else ; go to Else if i != jADD r1,r1,r2 ; f = g + h (skipped if i != j)B exit Else : SUB r0,r1,r2 ; f = g + h (skipped if i = j)Exit: Assembler calculates addresses Chapter 2 — Instructions: Language of the Computer — 31

  32. Compiling Loop Statements • C code: while (save[i] == k) i += 1; • i in r3, k in r5, base address of save in r6 • Compiled ARM code: Loop: ADD r12,r6, r3, LSL # 2 ; r12 = address of save[i] LDR r0,[r12,#0] ; Temp reg r0 = save[i] CMP r0,r5 BNE Exit ; go to Exit if save[i] ≠ k ADD r3,r3,#1 ; i = i + 1 B Loop ; go to Loop Exit: Chapter 2 — Instructions: Language of the Computer — 32

  33. Basic Blocks • A basic block is a sequence of instructions with • No embedded branches (except at end) • No branch targets (except at beginning) • A compiler identifies basic blocks for optimization • An advanced processor can accelerate execution of basic blocks Chapter 2 — Instructions: Language of the Computer — 33

  34. Signed vs. Unsigned • Signed comparison: BGE,BLT,BGT,BLE • Unsigned comparison: BHS,BLO,BHI,BLS • Example • r0 = 1111 1111 1111 1111 1111 1111 1111 1111 • r1 = 0000 0000 0000 0000 0000 0000 0000 0001 • CMP r0,r1 • BLO L1 ; unsigned branch • Branch not taken since 4,294,967,295ten > 1ten • BLT L2 ; signed branch • Branch taken to L2 since -1ten < 1ten. Chapter 2 — Instructions: Language of the Computer — 34

  35. Procedure Calling • Steps required • Place parameters in registers • Transfer control to procedure • Acquire storage for procedure • Perform procedure’s operations • Place result in register for caller • Return to place of call §2.8 Supporting Procedures in Computer Hardware Chapter 2 — Instructions: Language of the Computer — 35

  36. ARM register conventions Chapter 2 — Instructions: Language of the Computer — 36

  37. Procedure Call Instructions • Procedure call: Branch and link BL ProcedureAddress • Address of following instruction put in lr • Jumps to target address • Procedure return: MOV pc,lr • Copies lr to program counter • Can also be used for computed jumps • e.g., for case/switch statements Chapter 2 — Instructions: Language of the Computer — 37

  38. Leaf Procedure Example • C code: int leaf_example (int g, h, i, j){ int f; f = (g + h) - (i + j); return f;} • Arguments g, …, j in r0, …, r3 • f in r4 (hence, need to save r4 on stack) • Result in r0 Chapter 2 — Instructions: Language of the Computer — 38

  39. Leaf Procedure Example • ARM code: leaf_example: SUB sp, sp, #12 STR r6,[sp,#8] STR r5,[sp,#4] STR r4,[sp,#0] ADD r5,r0,r1 ADD r6,r2,r3 SUB r4,r5,r6 MOV r0,r4 LDR r4, [sp,#0] LDR r5, [sp,#4] LDR r6, [sp,#8] ADD sp,sp,#12 MOV pc,lr Make room for 3 items Save r4,r5,r6 on stack r5 = (g+h), r6= (i+j)Result in r4 Result moved to return value register r0. Restore r4,r5,r6 Return Chapter 2 — Instructions: Language of the Computer — 39

  40. Non-Leaf Procedures • Procedures that call other procedures • For nested call, caller needs to save on the stack: • Its return address • Any arguments and temporaries needed after the call • Restore from the stack after the call Chapter 2 — Instructions: Language of the Computer — 40

  41. Non-Leaf Procedure Example • C code: int fact (int n){ if (n < 1) return f; else return n * fact(n - 1);} • Argument n in register r0 • Result in register r0 Chapter 2 — Instructions: Language of the Computer — 41

  42. Non-Leaf Procedure Example • ARM code: fact: SUB sp,sp,#8 ; Adjust stack for 2 items STR lr,[sp,#8] ; Save return address STR r0,[sp,#0] ; Save argument n CMP r0,#1 ; compare n to 1 BGE L1 MOV r0,#1 ; if so, result is 1 ADD sp,sp,#8 ; Pop 2 items from stack MOV pc,lr ; Return to callerL1: SUB r0,r0,#1 ; else decrement n BL fact ; Recursive call MOV r12,r0 ; Restore original n LDR r0,[sp,#0] ; and return address LDR lr,[sp,#0] ; pop 2 items from stack ADD sp,sp #8 ; MUL r0,r0,r12 ; Multiply to get result MOV pc,lr ; and return Chapter 2 — Instructions: Language of the Computer — 42

  43. Local Data on the Stack • Local data allocated by callee • e.g., C automatic variables • Procedure frame (activation record) • Used by some compilers to manage stack storage Chapter 2 — Instructions: Language of the Computer — 43

  44. Memory Layout • Text: program code • Static data: global variables • e.g., static variables in C, constant arrays and strings • Dynamic data: heap • E.g., malloc in C, new in Java • Stack: automatic storage Chapter 2 — Instructions: Language of the Computer — 44

  45. Character Data • Byte-encoded character sets • ASCII: 128 characters • 95 graphic, 33 control • Latin-1: 256 characters • ASCII, +96 more graphic characters • Unicode: 32-bit character set • Used in Java, C++ wide characters, … • Most of the world’s alphabets, plus symbols • UTF-8, UTF-16: variable-length encodings §2.9 Communicating with People Chapter 2 — Instructions: Language of the Computer — 45

  46. Byte/Halfword Operations • Could use bitwise operations • ARM byte load/store • String processing is a common case LDRB r0, [sp,#0] ; Read byte from source STRB r0, [r10,#0] ; Write byte to destination • Sign extend to 32 bits LDRSB ; Sign extends to fill leftmost 24 bits • ARM halfword load/store LDRH r0, [sp,#0] ; Read halfword (16 bits) from source STRH r0,[r12,#0] ; Write halfword (16 bits) to destinationSign extend to 32 bits LDRSH ; Sign extends to fill leftmost 16 bits Chapter 2 — Instructions: Language of the Computer — 46

  47. String Copy Example • C code (naïve): • Null-terminated string void strcpy (char x[], char y[]){ int i; i = 0; while ((x[i]=y[i])!='\0') i += 1;} • Addresses of x, y in registers r0, r1 • i in register r4 Chapter 2 — Instructions: Language of the Computer — 47

  48. String Copy Example • ARM code: strcpy: SUB sp,sp, #4 ; adjust stack for 1 item STR r4,[sp,#0] ; save r4 MOV r4,#0 ; i = 0 + 0L1: ADD r2,r4,r1 ; addr of y[i] in r2 LDRB r3, [r2, #0] ; r3 = y[i] ADD r12,r4,r0 ; ; Addr of x[i] in r12 STRB r3 [r12, #0] ; x[i] = y[i] BEQ L2 ; exit loop if y[i] == 0 ADD r4,r4,#1 ; i = i + 1 B L1 ; next iteration of loopL2: LDR r4, [sp,#0] ; restore saved r4 ADD sp,sp, #4 ; pop 1 item from stack MOV pc,lr ; return Chapter 2 — Instructions: Language of the Computer — 48

  49. 32-bit Constants • Most constants are small • 16-bit immediate is sufficient • For the occasional 32-bit constant • Load 32 bit constant to r4 §2.10 ARM Addressing for 32-Bit Immediates and Addresses 0000 0000 1101 1001 0000 0000 0000 0000 The 8 non-zerobits (1101 11012 , 217ten) of the constant is rotated by 16 bits and MOV instruction (opcode -13) loads the 32 bit value Chapter 2 — Instructions: Language of the Computer — 49

  50. Branch Instruction format Condition 12 address 4 bits 4 bits 24 bits • Encoding of options for Condition field Chapter 2 — Instructions: Language of the Computer — 50

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