1 / 11

ECE 291

ECE 291. Lecture 1: Microprocessor Evolution & Organization Constantine D. Polychronopoulos Professor, ECE Office: 463 CSRL. Spring 2000. History of Microprocessors. First microprocessor introduced by Fairchild/Intel: 4004 & 4040, 4-bit proc.

clove
Download Presentation

ECE 291

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. ECE 291 Lecture 1: Microprocessor Evolution & Organization Constantine D. Polychronopoulos Professor, ECE Office: 463 CSRL Spring 2000 ECE 291 -- Spring 2000

  2. History of Microprocessors • First microprocessor introduced by Fairchild/Intel: 4004 & 4040, 4-bit proc. • Next generation was the 8-bit 8008 & 8080, Zilog Z-80, followed by the 16-bit 8088/8086. • 32-bit microprocessors introduced in 1986 by Intel as the 80386 (or 386) with 32-bit datapath and 32-bit mem. address. This was the beginning of the modern microprocessor. • Currently: 64-bit, 30M+ trans. ~1GHz, 4+-issue ECE 291 -- Spring 2000

  3. 486 Microprocessor 386-like Integer Processor 387 Numeric Co-processor 8Kb Cache The New Era with x486 - 486 was clocked at 50MHz, 66 MHz with memory at 33MHz - Half of instructions took 2 clocks and half 1 clock (20-25ns) - A later version at 100MHz and an overdrive 486DX4 were introduced in the early 90’s. ECE 291 -- Spring 2000

  4. Intel Family of Microprocessors ECE 291 -- Spring 2000

  5. Pentium Pro Microprocessor Datapath3 Datapath2 Datapath1 64Kb Split (I & D) Cache Superscalar & VLIW Processors Merced - 64-bit EPIC Datapath4 Datapath2 Datapath3 Datapath1 64 Predicate Registers 128 Int. Registers 128 FP Registers >512Kb Split (I & D) Cache ECE 291 -- Spring 2000

  6. Cache Microprocessor Organization of a Computer (PC) Memory System System (Memory) Bus Tape Console Disk I/O System PCI (Peripheral Component Interconnect) bus in most of current PCs ECE 291 -- Spring 2000

  7. BUS Standards PCI: Peripheral Component Interconnect (General memory bus) USB: Universal Serial Bus (Special I/O bus 10-100Mbps) AGP: Advanced Graphics Port (Graphics I/O bus - > 533Mbps) USB & AGP work in conjunction with the PCI bus ECE 291 -- Spring 2000

  8. Modern Microprocessor Architecture I-cache Registers Memory Manag.Unit Control Unit Datapath Bus Interf. Unit Branch Prediction D-cache Microprocessor Architecture D-cache (Memory) Decode & Oper. fetch I-Fetch I-cache Execute Alignment Commit Instruction Execution ECE 291 -- Spring 2000

  9. I-Fetch I-Fetch I-Fetch Decode & Oper. fetch Decode & Oper. fetch Decode & Oper. fetch Memory Memory Memory Write Back Write Back Write Back Execute Execute Execute Pipelining Before: Instruction 1 Instruction 2 Instruction 3 NOW: Clock 1 Clock 2 Clock 3 ECE 291 -- Spring 2000

  10. Processor Registers • ALU registers (AX) • User (GP) registers • Special (user) registers • System registers (used by OS) • System registers/buffers (used by I/O system) ECE 291 -- Spring 2000

  11. Memory System • Memory system architecture • Memory bus • Memory Map (memory layout) • BIOS & bootstrapping • OS kernel • I/O drivers & I/O operations ECE 291 -- Spring 2000

More Related