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The 2nd JILP Workshop on Computer Architecture Competitions (JWAC-2) presents the Championship Branch Prediction competition, sponsored by JILP and Intel's Academic Research Office. This competition includes two tracks: Conditional Branch Predictor and Indirect Branch Predictor, with a total of 11 paper submissions across Asia, Europe, and North America. Performance Ranking, Novel Ideas, and Overall Paper Quality are key evaluation metrics. Accepted papers feature base algorithms like TAGE and ITTAGE, OGEHL, Perceptron Predictor, Neural Analog Predictor, Loop Predictor, and various enhancements. Join us in exploring the latest advancements in branch prediction!
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2nd JILP Workshop onComputer Architecture Competitions (JWAC-2):Championship Branch Prediction Sponsored by JILP and Intel’s Academic Research Office
Submissions • Two tracks • Conditional branch predictor • Indirect branch predictor • Submissions • 11 total papers ( 7 conditional, 4 indirect) • Distribution • Asia – 2 • Europe - 2 • North America - 7
Metrics • Performance Ranking • Novel Ideas • Overall Paper Quality • Adherence to Competition Rules
Process • Reviews • 2 to 3 reviews per paper • Offline program committee meeting 9 Papers Accepted
Types of Algorithms/Enhancements • Base algorithms: • TAGE and ITTAGE • OGEHL • Perceptron predictor • Neural Analog predictor • Loop predictor • Enhancements • Immediate update mimicker • Adaptive Rehashing • Misprediction penalty • Load-branch correlation • Many more: target compression, dynamic fitting, filters etc.
Thanks • Organizing Committee • Hongliang Gao, Intel (Chair) • Alaa Alameldeen, Intel • Chris Wilkerson, Intel • Web • Eric Rottenberg • Program Committee • Trevor Mudge, University of Michigan (Chair) • Alaa Alameldeen, Intel • Hongliang Gao, Intel • Daniel Jimenez, UT-San Antonio • Yale Patt, Texas • Andre Seznec, INRIA • Lucian Vintan, University of Sibiu • Chris Wilkerson, Intel • Sponsors: • Intel’s Academic Research Office • JILP