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COM/DCOM Basics

COM/DCOM Basics. Security: NT Security SSL Certificates Kerberos IP Security. Accessing COM services. Multiple network Transports. In the same Process : direct function calls. TCP, UDP. C O M. Client. C O M. Component. IPX,SPX. Component. On the same machine: secure IPC.

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COM/DCOM Basics

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  1. COM/DCOM Basics Security: • NT Security • SSL Certificates • Kerberos • IP Security Accessing COM services Multiple network Transports In the same Process: direct function calls TCP, UDP C O M Client C O M Component IPX,SPX Component On the same machine: secure IPC HTTP Client Process Server Process Queued... COM Client Machine Server Machine Component Client Across machines: secure DCE-RPC based DCOM protocol Client Process Server Process Client Component COM COM DCE-RPC

  2. Data access overview • Windows OS offers several Database Client technologies • OLE DB - recent technology, replacing former ODBC standard • growing choice of commercial OLE DB providers • OLE DB OS ( NT, UNIX, VMS ) interoperability • OLE DB provides highest performance compared to other (here discussed) technologies • ADO - provides object model for the database access

  3. MS Access as a Database Example

  4. NI-VISA - National Instruments implementation of industry standard package for configuring, programming and troubleshoting of instrumentation systems based on VXI, VME, GPIB and Serial interfaces unified program acces to all interfaces LabWindows, LabView, C, C++, Visual basic interfaces set of libraries, interactive tools and configuration utilities Virtual Instruments SoftwareArchitecture - VISA

  5. Bundled Tools Test and Measurement Explorer VXI Interactive control VIC - Visa Interactive Control

  6. Test systems for the Alice1 chip • Verification tests with IMS IC tester • system setup • software components • DAQ test system for detector prototypes • hardware setup • backup options • status of software components • DAQ software • software for JTAG control • data logging • evaluation of results

  7. Software for the Test Campaign Tester Setup Lab Setup Testbeam Setup • Non portable setup - for use only at CERN • Primary task: Chip debugging • Based on commercial software (IMS Screens, IMS-Link, TESTview • People involved: Sajan Easo (LHC-B), P. Chochula (Alice) + chip developers, Mike Burns (Verilog JTAG model) • Currently developed and used at CERN • LabView + VISA +COM based • Primary tasks: Chip characterization, debugging of VME electronics • People involved: P. Chochula, P. Rosinsky (Bratislava) • Currently “under study” • Based on Motorola and DATE • Primary task: test beam data taking • Special requirement: must be compatible with Lab Setup at least at the data level • People involved: Anton Jusko, P. Chochula

  8. Data Logger V M E B U S Yes No Test? Error Analyzer TX FiFo Test Panel C/SR L i n k RX FiFo VISA Layer RX FiFo Ethernet GPIB C/SR Run Mode? PCI-VME Test TX FiFo HP16500C Pilot-Serlink Test System

  9. Pilot-Serlink Test Panel • Software components: • Event generator • VME control • Event analyzer • Error analyzer • Data logger • Tests with external PG • TCP/IP communication • Program generator

  10. IC Tester Setup VXIpc-850 Win. NT SUN Solaris Available software tools: • SCREENS - package for the control and execution of digital tests on the IMS tester • IMS-LINK - translation of test patterns (Verilog interface) • SEQUENTEST - LABview compatible test sequencer • LIMITEST - tool to define acceptance limits for analog measurements • VIM - Virtual Instrument Manager, handles communication between Slot0 controller and SUN • WAVEMAKE - generation and analysis of analog and digital signals VIM IMS Link SCREENS

  11. Software interface : Screens will be used to debug the chips TestView based programs will be used to characterize the chips (complicated measurements requiring multiple runs and data evaluation) Possible test enhancements: Connection Wafer Prober - IC tester exists, but was not yet tested need to synchronize with a PC controlling the prober (using LabView and BusLab) There is no JTAG controller attached to the tester. To overcome this limitation one can: Emulate JTAG controller with the tester: Use Verilog Simulation or an vector generator to prepare patterns which will be scanned to the chip. Reloading of patterns might be slow! Use external PC equipped with F100 board. This task involves synchronisation of PC and SUN over TCPIP, which should be fast. However there is a risk of inducing new problems while using additional hardware and software Interfacing with IC tester

  12. TestView • Programming environment using LabView • Provides the same tester control capabilities as Screens &Co. • Handles communication with the LogicMaster TestVIEW TestModules/TestLITE IMS Applications TestEnvironment TestLITE “C”library IMS Applications MATTS Server Interface Tester Firmware LM Command language

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