CSE 331 Computer Organization and Design Fall 2007 Week 1

1. CSE 331Computer Organization and DesignFall 2007Week 1 Section 1: Mary Jane Irwin (www.cse.psu.edu/~mji) Section 2: Krishna Narayanan Course material on ANGEL: cms.psu.edu [slides adapted from D. Patterson slides with additional credits to Y. Xie]

2. Course Administration • Instr (Sec1): Mary Jane Irwin (mji@cse.psu.edu) • 348C IST Bldg • OH’s: Tues 2:30 – 3:45pm & Wed 9:15 – 10:30am • Instr (Sec2): Krishna Narayanan (snarayan@cse.psu.edu ) • 348D IST Bldg • OH’s: TBD • TA: Evens Jean (jean@cse.psu.edu ) • 360E IST Bldg • OH’s: Tues, Thurs 2:30 – 4:00pm • Web: ANGEL, cms.psu.edu • Lab: Accounts on CSE machines in 220 IST, Windows Lab • Texts: Computer Organization and Design: The Hardware/Software Interface, 3rd Edition Revised Printing, Patterson and Hennessy VHDL Starter’s Guide, 2nd Edition, Yalamanchili

3. Grading Information • Grade determinates • Exam #1 ~20% • Tuesday, October 2, 6:30 – 7:45pm, 113 IST • Exam #2 ~20% • Thursday, November 8, 6:30 – 7:45, 113 IST • Final Exam ~25% • Section 1 & 2: TBD • Homeworks/Programming Assignments ~25% • Quizzes (in-class & ANGEL) ~ 5% • Class attendance ~ 5% • CSE 331 is a “C required course” for both CmpSc and CmpEng majors Email instructor ASAP if you have an exam conflict !

4. Grading Policies • Assignments will be submitted electronically through ANGEL and must be submitted by 5:00pm on the due date. No late assignments will be accepted. • Most programming assignments will follow the “pair programming” paradigm • Duplicate assignments will receive duplicate grades of zero. Second offenses will result in a final course grade of F. • Grades will be posted on the ANGEL website • See TA about questions on the assignments; see instructors about grading questions on the exams • Must submit email request for change of grade after discussions with the TA or instructor • December 12 deadline for filing grade corrections; no requests for grade changes/updates will be accepted after this date

5. What is Pair Programming? • Two programmers work side-by-side at one computer continuously collaborating on the same design, algorithm, code, or test • The fourteen principles of pair programming • Share everything • Play fair – take turns “driving”, when not “driving” don’t be a passive observer, do be active and engaged • Don’t hit people – stay on task (so no reading email or surfing) • … • Take a nap (or a break from working together) every afternoon • Why do it? • Has been shown to improve productivity and the quality of software http://portal.acm.org/citation.cfm?id=332833.332848&coll=portal&dl=ACM&idx=332833&part=periodical&WantType=periodical&title=Communications%20of%20the%20ACM&CFID=891725&CFTOKEN=22811657

6. Course Goals and Structure • Introduction to the major components of a computer system, how they function together in executing a program, how they are designed • MIPS assembler programming using the spim system • VHDL design simulation using Mentor Graphics ModelSim • Prerequisite: CSE 271 (INTRO TO DIGITAL SYSTEMS. Introduction to logic design and digital systems, boolean algebra, and introduction to combinatorial and sequential circuit design and analysis) • If you are also taking CSE 472 you will learn yet another assembly language (Motorola 68HC12)

7. spim Assembler and Simulator • spim is a simulator that runs MIPS32 assembly language programs • It provides a simple assembler, debugger and a simple set of operating system services • It implements both a simple, terminal-style interface (spim) and a visual windowing interface (xspim and PCSpim) • (Version 7.3) available as • xspim (or spim) for unix, linux, and Mac OS X • Installed on the CSE unix/linux machines in the lab • PCSpim (or spim) for Windows (NT, 2000, XP) • Installed on the CSE windows machines in 220 IST and/or can be downloaded and installed on your own PC from http://pages.cs.wisc.edu/~larus/spim.html

8. vhdl Simulation • ModelSim is a hardware description language simulator from Mentor Graphics • Simulation (gate-level and RTL-level) and integrated debug environment • Verilog and VHDL • Intuitive GUI for post-simulation debug and analysis http://www.model.com/products/products_se.asp • ModelSim SE is installed on the windows machines in 220 IST • ModelSim PE Student Edition is available for free download from http://www.model.com/resources/student_edition/student_default.asp • If you are taking CSE 471 or 478 you will gain even more experience with the Mentor Graphics tools

9. ModelSim Screen Shot

10. What You Should Already Know • How to write, compile and run programs in a higher level language (C, C++, Java, …) • How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.) • Logic design • How to design of combinational and sequential components (Boolean algebra, logic minimization, technology mapping, decoders and multiplexors, latches and flipflops, registers, mealy/moore finite state machines, state assignment and minimization, etc.) • How to use a logic schematic capture and simulation tool (e.g., LogicWorks)

11. Schedule • This week’s material • Course introduction, basics of a computer system, introduction to SPIM • Reading assignment – PH 1.1 through 1.3 and A.9 • Next week’s material • Introduction to MIPS assembler, adds/loads/stores • Reading assignment - PH 2.1 through 2.4 • Entire semester course schedule can be accessed on ANGEL under the Lessons tab

12. Quote for the Day “I got the idea for the mouse while attending a talk at a computer conference. The speaker was so boring that I started daydreaming and hit upon the idea.” Doug Engelbart

13. The Evolution of Computer Hardware • When was the first transistor invented? • Modern-day electronics began with the invention in 1947 of the transfer resistor - the bi-polar transistor - by Bardeen et.al at Bell Laboratories

14. The Evolution of Computer Hardware • When was the first IC (integrated circuit) invented? • In 1958 the IC was “born” when Jack Kilby at Texas Instruments successfully interconnected, by hand, several transistors, resistors and capacitors on a single substrate

15. The Underlying Technologies What if technology in the transportation industry advanced at the same rate?

16. The PowerPC 750 • Introduced in 1999 • 3.65M transistors • 366 MHz clock rate • 40 mm2 die size • 250nm (0.25micron) technology

17. Technology Outlook

18. Impacts of Advancing Technology • Processor • logic capacity: increases about 30% per year • performance: 2x every 1.5 to 2 years • Memory • DRAM capacity: 4x every 3 years, about 60% per year • speed: 1.5x every 10 years • cost per bit: decreases about 25% per year • Disk • capacity: increases about 60% per year • speed: • cost per bit:

19. Growth Capacity of DRAM Chips In recent years growth rate has slowed to 2x every 2 year K = 1024 (210)

20. Computer Organization and Design • This course is all about how computers work • But what do we mean by a computer? • Different types: embedded, laptop, desktop, server • Different uses: automobiles, graphics, finance, genomics,… • Different manufacturers: Intel, AMD, IBM, HP, Apple, IBM, Sony, Sun … • Different underlying technologies and different costs ! • Best way to learn: • Focus on a specific instance and learn how it works • While learning general principles and historical perspectives

21. Embedded Computers in You Car

22. Growth of Sales of Embedded Computers

23. Why Learn This Stuff? • You want to call yourself a “computer scientist/engineer” • You want to build HW/SW people use (so you need to deliver performance at low cost) • You need to make a purchasing decision or offer “expert” advice • Both hardware and software affect performance • The algorithm (CSE 465) determines number of source-level statements • The language/compiler/architecture (CSE 428/421/331&431) determine the number of machine-level instructions • (Chapter 2 and 3) • The processor/memory (CSE 331&431) determine how fast machine-level instructions are executed • (Chapter 5, 6, and 7)

24. What is a Computer? • Components: • processor (datapath, control) • input (mouse, keyboard) • output (display, printer) • memory (cache (SRAM), main memory (DRAM), disk drive, CD/DVD) • network • Our primary focus: the processor (datapath and control) • Implemented using millions of transistors • Impossible to understand by looking at each transistor • We need abstraction!

25. Major Components of a Computer

26. Head’s Up • This week’s material • Course introduction • Reading assignment – PH 1.1 through 1.3 and A.9 • Reminders • Make sure your CSE account is operational; change your password to something you can remember and that is secure (must be 12 or more alphanumeric characters of three types) • Question/comments about the system go to helpdesk@cse.psu.edu ; questions about the programming assignments go to the course TA • Check out the course homepage at ANGEL! • Next week’s material • Introduction to MIPS assembler • Reading assignment - PH 2.1 through 3.3, 3.4, and 3.7

27. Quote for the Day “We all make mistakes … Our designs have to work flawlessly despite us.” Bob Colwell The Pentium Chronicles

28. C compiler assembler Below the Program • High-level language program (in C) swap (int v[], int k) (int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; ) • Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 • Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 . . . one-to-many one-to-one

29. Advantages of Higher-Level Languages ? • Higher-level languages • As a result, very little programming is done today at the assembler level • Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, Java for web programming, …) • Improve programmer productivity – more understandable code that is easier to debug and validate • Improve program maintainability • Allow programs to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) • Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine

30. Machine Organization • Capabilities and performance characteristics of the principal Functional Units (FUs) • e.g., register file, ALU, multiplexors, memories, ... • The ways those FUs are interconnected • e.g., buses • Logic and means by which information flow between FUs is controlled • The machine’s Instruction Set Architecture (ISA) • Register Transfer Level (RTL) machine description

31. ISA Sales

32. Major Components of a Computer Devices Processor Network Control Memory Input Datapath Output

33. C compiler assembler Below the Program • High-level language program (in C) • swap (int v[], int k) • . . . • Assembly language program (for MIPS) • swap: sll $2, $5, 2 • add $2, $4, $2 • lw $15, 0($2) • lw $16, 4($2) • sw $16, 0($2) • sw $15, 4($2) • jr $31 • Machine (object) code (for MIPS) • 000000 00000 00101 0001000010000000 • 000000 00100 00010 0001000000100000 • 100011 00010 01111 0000000000000000 • 100011 00010 10000 0000000000000100 • 101011 00010 10000 0000000000000000 • 101011 00010 01111 0000000000000100 • 000000 11111 00000 0000000000001000

34. Input Device Inputs Object Code 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000 Devices Processor Network Control Memory Input Datapath Output

35. Object Code Stored in Memory Devices Memory Processor Network 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000 Control Input Datapath Output

36. Processor Fetches an Instruction Processor fetches an instruction from memory Memory Devices Processor Network 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000 Control Input Datapath Output

37. Control Decodes the Instruction Control decodes the instruction to determine what to execute Devices Processor Network Control 000000 00100 00010 0001000000100000 Memory Input Datapath Output

38. Datapath Executes the Instruction Datapath executes the instruction as directed by control Devices Processor Network Control 00000000100 000100001000000100000 Memory Input Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2 Output

39. Fetch Exec Decode What Happens Next? Processor fetches the next instruction from memory Devices Memory Processor Network 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000 Control Input Datapath Output How does it know which location in memory to fetch from next?

40. Processor Organization • Control needs to have circuitry to • Decide which is the next instruction and input it from memory • Decode the instruction • Issue signals that control the way information flows between datapath components • Control what operations the datapath’s functional units perform • Datapath needs to have circuitry to • Execute instructions - functional units (e.g., adder) and storage locations (e.g., register file) • Interconnect the functional units so that the instructions can be executed as required • Load data from and store data to memory What location does it load from and store to?

41. Output Data Stored in Memory At program completion the data to be output resides in memory Memory Devices Processor Network Control Input 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 Datapath Output

42. Output Device Outputs Data Devices Processor Network Control Memory Input Datapath Output 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000

43. The Instruction Set Architecture (ISA) software instruction set architecture hardware The interface description separating the software and hardware

44. The MIPS ISA Registers • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special R0 - R31 PC HI LO • 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate OP jump target Q: How many already familiar with MIPS ISA?

45. How Do the Pieces Fit Together? • Coordination of many levels of abstraction • Under a rapidlychanging set of forces • Design, measurement, and evaluation Applications Operating CSE 411 System CSE 421 Compiler Firmware Instruction Set Architecture Memory system I/O system network Processor CSE 458 CSE 331 & 431 Datapath & Control Digital Design CSE 271 & 471 Circuit Design CSE 447 & 477

46. Review and Reminder • Next week’s material • Introduction to MIPS assembler • Reading assignment - PH 2.1 through 2.4 • Homework 1 due on Tuesday, Sept. 4 by 5:00 PM • Submit on ANGEL – individual programming this time ! • Other reminders • Install PCSpim on your laptop • Keep track of course updates on ANGEL • Make sure your CSE account is operational; change your password to something you can remember and that is secure (must be at least 12 alphanumeric characters of 3 types) • Question/comments about the lab hardware/system go to helpdesk@cse.psu.edu ; questions about the programming assignments go to the course TA