IML Probationary Members’ Final Project – ECE Track

1. Electrical and Electronics Engineering InstituteCollege of EngineeringUniversity of the Philippines, Diliman IML Probationary Members’ Final Project – ECE Track Microelectronics and Microprocessors Laboratory

2. Overview Introduction Project Specifications Methodology

3. CurrentTrend LOW POWER Health Monitoring Mobile Comms Field Testing Introduction • Project Specifications• Methodology

4. ProjectObjectives • design & implement a CMOS op-amp topology for low-power application • formulate testing methodology • for device characterization • generating plots for datasheet • model bond wires Introduction • Project Specifications• Methodology

5. LowPowerIndustry 250,000 V/V gain 250 μW  power consumption rail-to-rail input/output capability Introduction • Project Specifications• Methodology

6. Op-ampFeatures LPC661 by National Semiconductor Different Process! Introduction • Project Specifications• Methodology

7. Op-ampFeatures Different Topology! TSM27M2C by STMicroelectronics Bi-CMOS Process! Introduction • Project Specifications• Methodology

8. 15,000 2.5 mW Design Constraints Minimum DC Gain (Av) Maximum Power Consumption Introduction • Project Specifications• Methodology

9. Design & Implementation 2-stage or Miller Common Source Amplifier Differential Amplifier Bias Circuit Introduction • Project Specifications• Methodology

10. Design & Implementation Differential Amplifier Group Transistors Derive Parameter Dependencies Introduction • Project Specifications• Methodology

11. 1 2 3 Design & Implementation Differential Amplifier Transistor Pairs Introduction • Project Specifications• Methodology

12. Group Transistors Derive Parameter Dependencies Derive Parameter Dependencies Set Current Set Length Compute Widths Adjust Widths Size Resistor N Extract Parameters Met? Y Check Constraints End Design & Implementation Differential Amplifier Introduction • Project Specifications• Methodology

13. Design and Implementation Differential Amplifier Introduction • Project Specifications• Methodology

14. Design and Implementation Differential Amplifier Introduction • Project Specifications• Methodology

15. Design and Implementation Differential Amplifier Introduction • Project Specifications• Methodology

16. Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

17. Group Transistors Derive Parameter Dependencies Derive Parameter Dependencies Set Current Set Length Vary Widths Adjust Widths Plot Gain N Extract Parameters Met? Y Check Constraints End Design & Implementation Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

18. Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

19. Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

20. Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

21. Design & Implementation Common Source Amplifier Introduction • Project Specifications• Methodology

22. Design & Implementation 2 Stage Amplifier Introduction • Project Specifications• Methodology

23. Design & Implementation 2 Stage Amplifier Introduction • Project Specifications• Methodology

24. Design & Implementation Internal Routing Minimized Introduction • Project Specifications• Methodology

25. Design & Implementation Guard Rings as Close as Possible Introduction • Project Specifications• Methodology

26. Design & Implementation Metal over Metal Minimized Introduction • Project Specifications• Methodology

27. Design & Implementation # of contacts & vias maximized Introduction • Project Specifications• Methodology

28. Design & Implementation Consistent Routing Direction Introduction • Project Specifications• Methodology

29. 0.60um Design & Implementation 0.60um Width for routing Metal Introduction • Project Specifications• Methodology

30. Design & Implementation NMOS Transistors Introduction • Project Specifications• Methodology

31. Design & Implementation PMOS Transistors Introduction • Project Specifications• Methodology

32. Design & Implementation Miller or 2 Stage Op-Amp Introduction • Project Specifications• Methodology

33. Design & Implementation Vertical Parallel-plate Capacitor Introduction • Project Specifications• Methodology

34. Design & Implementation Compensation Capacitor 5 pF Introduction • Project Specifications• Methodology

35. Design & Implementation 2 Stage Op-Amp with Compensation Introduction • Project Specifications• Methodology

36. Design & Implementation 2 Stage Op-Amp with Probe Pads Introduction • Project Specifications• Methodology

37. Design & Implementation Miller Op-amp w/ Bond Pads vdd vin+ vin- gnd vout Introduction • Project Specifications• Methodology

38. Design & Implementation 2 Stage Op-Amp Introduction • Project Specifications• Methodology

39. Power supply rejection 3dB bandwidth Gain margin Gain-bandwidth product Phase margin Testing Methodology AC Analysis Parameters Introduction • Project Specifications• Methodology

40. Schematic for Gain (dB) Introduction • Project Specifications• Methodology

41. Frequency Response 184.78Hz 2.16kHz 16.26kHz Introduction • Project Specifications• Methodology

42. Settling time Slew rate Testing Methodology Transient Analysis Parameters Introduction • Project Specifications• Methodology

43. Schematic for Settling Time Introduction • Project Specifications• Methodology

44. Settling Time Comparison Introduction • Project Specifications• Methodology

45. BondWireModeling Introduction • Project Specifications• Methodology

46. BondWireModeling Introduction • Project Specifications• Methodology

47. BondWireModeling with bond wires without bond wires Introduction • Project Specifications• Methodology

48. BondWireModeling with bond wires without bond wires Introduction • Project Specifications• Methodology

49. ProblemsEncountered • Constraints not possible to achieve in length used by previous thesis (0.5um) • Length used was 1.2um

50. Questions