1 / 13

Scientific Applications on a NASA Reconfigurable Hypercomputer

Scientific Applications on a NASA Reconfigurable Hypercomputer. by. Drs. Olaf Storaasli & Robert Singleterry NASA Langley Research Center, Hampton VA. and. Sam Brown, Star Bridge Systems * , Midvale UT. * NASA S pace A ct A greement. William Fithian* (Harvard, Merit Scholar, Oracle Award).

cyrah
Download Presentation

Scientific Applications on a NASA Reconfigurable Hypercomputer

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. ScientificApplications on a NASA Reconfigurable Hypercomputer by Drs. Olaf Storaasli & Robert Singleterry NASA Langley Research Center, Hampton VA and Sam Brown, Star Bridge Systems*, Midvale UT *NASA Space Act Agreement 1

  2. William Fithian*(Harvard, Merit Scholar, Oracle Award) *NASA-NHGS mentorship ‘00-’02 2

  3. FPGA: New Computing Paradigm Traditional CPU Reconfigurable FPGA Sequential: 1 operation/cycle Parallel: Inherent Fixed gates & data types Dynamic gates & data types Wasteful: 99% gates idle/cycle yet all draw power Efficient: Optimizes gates to task Software: Text Gateware: VIVA Icons & Transports do i = 1, billion c= a+b end do 392+ MFLOPS/64 MHz FPGA 3.92+ GFLOPS/10 FPGA board 26 MFLOPS/250 MHz SGI 3

  4. VIVA 1 (Feb ’01)VIVA2 (July ’02) VIVA: Gateware Development Tool What: Simple tool to configure FPGAs (VHDL cumbersome) How: Transforms high-level graphical code to logic circuitry Why: Achieve near-ASIC speed(w/o chip design) Growth in VIVA Capability Extensive Data Types Trig, Logs, Transcendentals File Input/Output Vector-Matrix Support Access to Multiple FPGAs Extensive Documentation Stable Development Few “bugs” NO Floating Point NO Scientific Functions NO File Input/Output NO Vector-Matrix Support Access to One FPGA Primitive Documentation Weekly Changes Frequent “bugs” 4

  5. Langley Hypercomputers 10 FPGAs each 5

  6. Langley Algorithms Developed* • Matrix Algebra: Vectors, Matrices, Dot Product • Factorial=> Probability: Combinations/Permutations AIRSC • Cordic=> Transcendentals: sin, log, exp, cosh… • Integration & Differentiation(numeric) • Matrix Equation Solver: [A]{x} = {b} via Gauss & Jacobi . • Dynamic Analysis: [M]{ü} + [C]{u} + [K]{u} + NLT = {P(t)} • Analog Computing: digital implementation • Nonlinear Analysis: “Analog” simulation avoids NLT solution development time *InAIAA& Military & Aerospace Programmable Logic Device (MAPLD) papers 6

  7. f(x) x Dx Numeric Integration Output (Area under curve) S f(x)*Dx xi+1=xi+Dx Dx f(x)=x2 f(x)*Dx Control 7

  8. VIVA Sparse Matrix Equation SolverJacobi Iterative (3x3 Demo) [A]{x}={b} x1 = 1/A11*(b1 - A12*x2 - A13*x3) Control 3 Row Loads 3 // Dot Products 8

  9. HAL15 HAL15 HAL30 HC-62M120x power HAL15LaRC West Robert @ SBS DARPA Prop. with NSA NSA NSAx2  NASA-SBS SAA SBS SBS SBS NASA-SBS SAA  Aug ‘01 Dec ‘01 May ‘02 Aug ‘02 Year 2 Progress - Roadmap Hardware VIVA1 VIVA1.5 VIVA2 VIVA Pathfinder NASA Engineering Analog Computing Large-scale Struc. Anal. Weather Code NL Structural Analysis ¦f(x)dx Dynamic Anal. [A]{x}={b} 106 eq.s dy/dx Cordic Apps JPL N! Partners USAF OSC PF MAPLD Conf. 9

  10. Langley Reconfigurable Computing Research References 1. Singleterry, Robert C., Jaroslav Sobieszczanski-Sobieski, and Samuel Brown. “Field-Programmable Gate Array Computer in Structural Analysis: an Initial Exploration.” 43rd American Institute of Aeronautics and Astronautics (AIAA) Structures, Structural Dynamics, and Materials Conference.April 22-25, 2002. 2. Storaasli, Olaf O., Robert C. Singleterry, and Samuel Brown. “Scientific Computations on a NASA Reconfigurable Hypercomputer.” Abstract accepted for 5th Military and Aerospace Programmable Logic Devices (MAPLD) Conference, Paper in preparation. September 10-12, 2002. 3. Fithian, William, Samuel Brown, and Tyler Reed. “Object Synchronization in VIVA 1.5.” Briefing prepared for VIVA users at NASA Marshall, Eglin AFB, Progress Forge, Inc., and Star Bridge Systems, Inc.March 26, 2002. 4. Barr, Kristen, Shaun Foley, and Robert A. Lewis II. “Hypercomputing with the CORDIC Algorithm.” August, 2001. Presentation of research conducted under Dr. Olaf O. Storaasli, June-August, 2001. 5. Butler, Patrick. New Horizons Governors School Mentorship Project. May, 2001. Presentation of research conducted under Dr. Olaf O. Storaasli, September 2000 – May 2001. 6.  Dandawate, Neha. “Reckless Speeding: The Investigation of the Programming Capabilities of the HAL Hypercomputer.” July, 2002. Presentation of research conducted under Dr. Olaf O. Storaasli, June – July, 2002. 7. Dandawate, Neha. “The Investigation of the Programming Capabilities of the HAL-15 Hypercomputer.” July, 2002. Paper on research conducted under Dr. Olaf O. Storaasli, June – July, 2002. 8. Fithian, William. “Developing a Matrix Equation Solver for the HAL-15 Hypercomputer.” December, 2001. Proposal for research to be conducted under Dr. Olaf O. Storaasli, September 2001 – May 2002. 9. Fithian, William. “Developing a Matrix Equation Solver for the HAL-15.” May, 2002. Presentation of research conducted under Dr. Olaf O. Storaasli, September 2001 – May 2002. 10. Fithian, William. “Jacobi Iterative Matrix Equation Solver for Star Bridge Systems FPGA Hypercomputer.” September, 2002. In preparation. 11. Foley, Shaun. “Scientific Hypercomputing.” August, 2001. Paper describing research conducted under Dr. Olaf O. Storaasli, June – August, 2001. 12. Krishnamurthy, Siddhartha. “Development of an Integration Algorithm for Field Programable Gate Arrays using VIVA.” July, 2002. Paper describing research conducted under Dr. Robert C. Singleterry, June – Aug 2002.  Further Information: http://hummer.larc.nasa.gov/acmbexternal/Personnel/Storaasli/reconfig.html 10

  11. New NASA Reconfigurable Hypercomputer 10 Xilinx XC2V6000 FPGAs (6M gates each) Viva/Windows 2000 2 Xeon 2.4GHz CPUs 2 73GB SCSI Drives 11

  12. Xilinx FPGA Gates Multiplies in H/W Clock Speed MHz Memory Memory Speed Reconfigure Time GFLOPS Total GFLOPs XC4062 62K 0 100 20Kb 466 Gb/s 100ms 0.4 4 (10 FPGAs) XC2V6000 6 million (97x) 144 (18x18) 300 (3x) 3.5 Mb (175x) 5 Tb/s (11x) 40ms (2.5x) 47 (120x) 470 (10 FPGAs) Year 2: Exploit Latest FPGAs Rapid Growth in FPGA Capability FPGA (Feb ’01) FPGA (Aug ’02) Plans: -Millions of Matrix Equations for Structures, Electromagnetics & Acoustics -Rapid Static & Dynamic Structural Analyses -Cray Vector Computations in Weather Code (VT PhD) - Robert on Administrator’s Fellowship at Star Bridge Systems - Joint proposals with NSA & DARPA - Simulate advanced computing concepts using VIVA - Collaborate with SBS to expand VIVA libraries - Influence VIVA development to meet NASA application needs - Expand FPGA applications for NASA programs 12

  13. SummaryWhat We’ve Learned We like FPGA promise – accomplished much Hardware: Tested 2 futuristic FPGA systems FPGAs: Inherently //, flexible, efficient, & fast VIVA: Powerful & growing (tailored to NASA needs) Applications: Diverse “pathfinder” algorithms developed FPGA technology: Advancing dramatically Speed: Year 1: 4 GFLOPS => Year 2: 470 GFLOPS Future: Year 2 promises “cutting edge” innovations comprehensive NASA engineering applications 13

More Related