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M-RAM (Magnetoresistive – Random Access Memory)

Kraków, 7 XII 2004r. M-RAM (Magnetoresistive – Random Access Memory). Information flux. Information transmission. Information Processing. Information storage. Information. Input. Outside word. Output. Magnetic (HDD) Optical (CD, DVD). DRAM, MRAM.

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M-RAM (Magnetoresistive – Random Access Memory)

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  1. Kraków, 7 XII 2004r M-RAM(Magnetoresistive – Random Access Memory)

  2. Information flux. Information transmission Information Processing Information storage Information Input Outside word Output Magnetic (HDD) Optical (CD, DVD) DRAM, MRAM M-RAM M. Bernacki, S. Wąsek

  3. Memory categories. WHY DO WEE NEED M-RAM MEMORY ???? M-RAM M. Bernacki, S. Wąsek

  4. Basic attractions of M-RAM. • Nonvolatility; • Speed; • Low-power consumption; • Scalability. M-RAM M. Bernacki, S. Wąsek

  5. Basic attractions of M-RAM. Transfer data to microprocessor without creating a bottleneck! M-RAM M. Bernacki, S. Wąsek

  6. History and development... • M-RAM – quick view. • Magnetoresistivity. M-RAM based on: • AMR effect - 80-th. • GMR effect - 80-th. • TMR effect – 1995 year. M-RAM M. Bernacki, S. Wąsek

  7. Storage and states of a bit. MRAM: charge and spin. Storage state: • DRAM: charge of capacitor. • Flash, EEPROM: charge on floating gate. • FeRAM: charge of a ferroelectric capacitor. Soft ferromagnet „1” Insulator Hard ferromagnet TMR [%] „0” Field [Oe] M-RAM M. Bernacki, S. Wąsek

  8. Implementationof 1-MTJ / 1-transistor cell. NiFe (free layer) Al2O3 (tunneling barrier) CoFe (fixed layer) SAF Ru CoFe (pinned layer) Word line M-RAM M. Bernacki, S. Wąsek

  9. Write. Word line Without digit line current With digit line current M-RAM M. Bernacki, S. Wąsek

  10. Write. RA [kOhm-um2] Word line Easy axis field [Oe] M-RAM M. Bernacki, S. Wąsek

  11. Read. Word line Word line M-RAM M. Bernacki, S. Wąsek

  12. Sizes of MTJ. Ferromagnet I 4nm NiFe (free layer) 1..2nm Al2O3 (tunneling barrier) Tunnel barrier 3nm CoFe (fixed layer) Ru 3nm CoFe (pinned layer) Ferromagnet II M-RAM M. Bernacki, S. Wąsek

  13. Other MRAM cell architectures. Twin cell arrays: • Circuit is faster than the 1T1TMR implementation. • Less atractive on a cell density and cost basis. Diode cell: • SOI diodes allow the integration of a memory with most circuits without sacrificing silicon wafer surface area. • SOI diodes suitable for this aplication haven’t been developed yet. Transistorless array: • Large reduce in cell area. • Complex circuity required to read bit state, slow read. M-RAM M. Bernacki, S. Wąsek

  14. MRAM 32Kb memory segment. Bit line 0 Bit line 31 Digit line Word line Word line Digit line M-RAM M. Bernacki, S. Wąsek

  15. Reference generator. RMAX RMIN Bit line Digit line Word line Wordline Digit line RMAX RMIN RREF = 1/2(RMAX + RMIN) M-RAM M. Bernacki, S. Wąsek

  16. 1Mb MRAM architecture. Available modes: • Active mode • Sleep mode • Standby mode M-RAM M. Bernacki, S. Wąsek

  17. Examples and performance of M-RAM technology. • Motorola semiconductors –2002. • Freescale semiconductors –2003/2004. • Technology: 0.6um, 5-level metal CMOS, copper interconnects; • Capacity: 1MB • Access time: 35ns • Technology: 0.18mikrons, 5-level metal CMOS, copper interconnects; • Capacity: 4MB; • Access time: 15-20ns M-RAM M. Bernacki, S. Wąsek

  18. Roadmap to future storage technologies. RRAM with CMR M-RAM M. Bernacki, S. Wąsek

  19. Bio – MRAM,vision for tomorrow? Biomolecule labeled by magnetic markers MRAM array M-RAM M. Bernacki, S. Wąsek

  20. References. • Wykład z przedmiotu „Magnetyczne nośniki pamięci”, AGH; • Materiały z Uniwersytetu Bielefeld: wykład „Thin films and nanostructures”; • Materiały seminaryjne z „Motorola Labs”; • Materiały z sympozjum „VLSI symposium 2002”; • www.freescale.com • www.motorola.com M-RAM M. Bernacki, S. Wąsek

  21. Dziękujemy za uwagę  M-RAM M. Bernacki, S. Wąsek

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