Ch. 3 MIPS RISC Machine

1. Ch. 3 MIPS RISC Machine Comp Sci 251 -- MIPS machine

2. MIPS processor Microprocessor w/o Interlocking Pipeline Stages • Windows CE devices • Cisco routers • Sony Playstation, PS2, PSP • Digital cameras Comp Sci 251 -- MIPS machine

3. MIPS Processor • Register file • Special high-speed memory locations • Separate from main memory • Datapath Circuitry • Performs arithmetic operations • Includes 32-bit ALU • Control unit • Circuitry for controlling datapath, memory, and I/O devices Comp Sci 251 -- MIPS machine

4. Register file • Thirty-two general purpose registers • Each holds 32 bits Comp Sci 251 -- MIPS machine

5. Special-purpose registers • Program counter register (PC) • Holds memory address of current instruction • Hi and Lo • Used for multiplication & division Comp Sci 251 -- MIPS machine

6. MIPS main memory • Byte-addressable memory • 32-bit addresses • Up to 232 bytes = 4 gigabytes • Word size = 32 bits • Word boundaries on addresses divisible by 4 Comp Sci 251 -- MIPS machine

7. Program memory model Memory contains three important segments • Text segment: program instructions • Data segment: global variables & constants • Stack segment: arguments & local variables Comp Sci 251 -- MIPS machine

8. Byte order 32-bit value  four consecutive bytes Example: 32-bit value 0x12345678 Two options: Big-endian Little-endian Low address High address Comp Sci 251 -- MIPS machine

9. Fetch-execute cycle Processor continuously does: • Read instruction • from text segment • Read operands • from registers, data segment, or stack segment • Perform operation • Store result • to register, data segment, or stack segment Comp Sci 251 -- MIPS machine

10. Examples • See /shared/huen/251/ch03 Comp Sci 251 -- MIPS machine