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James Harland james.harland@rmit.edu.au. COSC1078 Introduction to Information Technology Lecture 14 Revision and Review. Introduction to IT. 1-4 Introduction, Images, Audio, Video 5-6 Computer Fundamentals Assignment 1, WebLearn Test 1 7 Review
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Intro to IT James Harland james.harland@rmit.edu.au COSC1078 Introduction to Information TechnologyLecture 14Revision and Review
Intro to IT Introduction to IT 1-4 Introduction, Images, Audio, Video 5-6 Computer Fundamentals Assignment 1, WebLearn Test 1 7 Review 8 Operating Systems WebLearn Test 2 9 Operating Systems Assignment 2 10 Internet 11Internet Security WebLearn Test 3 12Future of IT Assignment 3, Peer and Self Assessment
Intro to IT Overview • Questions? • Floating point numbers • “Week 6 lectures” • Questions?
Excess Notation A different encoding of the numbers “naive” bit pattern encodes 4 more than actual value 100 (looks like 4) encodes 0 101 (looks like 5) encodes 1 110 (looks like 6) encodes 2 …. Lecture 14: Review Intro to IT
Floating Point exponent Mantissa sign bit 1 bit for sign 3 bits for exponent 4 bits for mantissa 100.101 Lecture 14: Review Intro to IT
Floating Point • Mantissa: digit sequence (1st digit always 1) • Exponent: where to put the . • This is generally given in ‘excess’ notation • Binary form of 2.423 x 104 01011001 means +ve 0.1001 shifted 101 place = 1.001 Lecture 14: Review Intro to IT
Intro to IT Memory • Memory differs in performance and cost • Processor is typically much faster than memory
Intro to IT Memory • Arranged as a hierarchy of cache Level 1 Level 2 Level 3 Main Memory
Processing ALU MEMORY CPU BUS REGISTERS Lecture 14: Review Intro to IT
Machine Instructions “Divide two numbers” Move first value from memory into register 1 Move second value from memory into register 2 If register 2 is zero, go to Step 6 Divide register 1 by register 2 & store result in register 3 Store register 3 value in memory Stop Lecture 14: Review Intro to IT
Instructions in Binary? 01010100001010101010100110100010101001101001010010100011100010101010100101111001001010… 10101100 10110011 00010010 00110011 00111111 MEMORY LOAD register 1 LOAD register 2 JUMP …. STORE …. Lecture 14: Review Intro to IT
One Scheme 16-bit operation codes(simple example) Operation Code (4 bits) Operand (12 bits) Represent as 4 Hexadecimal numbers (0-9,A-F) Each instruction is two bytes long Lecture 14: Review Intro to IT
One Scheme 156C LOAD register 5 from memory 6C 166DLOAD register 6 from memory 6D 5056ADD register 5 & 6 & store in register 0 306ESTORE register 0 to memory 6E C000HALT .... (up to 216 = 65,536 different instructions) Lecture 14: Review Intro to IT
Fetch Decode Execute FETCH Machine cycle EXECUTE DECODE Lecture 14: Review Intro to IT
Two special registers Instruction register:holds current instruction Program counter:address of next instruction Fetch: Put instruction specified by program counter into instruction register Increment program counter by two Decode: Work out what to do Execute: Perform the instruction Lecture 14: Review Intro to IT
Processing Address Contents A0 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 Program Counter Instruction Register Lecture 14: Review Intro to IT
Processing A0 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 FETCH Program Counter 156C Instruction Register Lecture 14: Review Intro to IT
Processing A2 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 FETCH Program Counter 156C Instruction Register Lecture 14: Review Intro to IT
Processing A2 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 6C 2B DECODE Program Counter 156C Instruction Register Lecture 14: Review Intro to IT
Processing A2 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 6C 2B Program Counter EXEC 156C Instruction Register 5 2B Lecture 14: Review Intro to IT
Processing A2 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 FETCH Program Counter 166D Instruction Register Lecture 14: Review Intro to IT
Processing A4 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 FETCH Program Counter 166D Instruction Register Lecture 14: Review Intro to IT
Processing A4 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 DECODE Program Counter 166D Instruction Register Lecture 14: Review Intro to IT
Processing A4 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 6D FF EXEC Program Counter 166D Instruction Register 6 FF Lecture 14: Review Intro to IT
Processing A6 A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 FETCH Program Counter 5056 Instruction Register Lecture 14: Review Intro to IT
Processing A0 15 A1 6C A2 16 A3 6D A4 50 A5 56 A6 30 A7 C0 A8 C0 A9 00 … Program Counter Instruction Register Lecture 14: Review Intro to IT
Processing B4 EXEC Program Counter B258 Instruction Register Lecture 14: Review Intro to IT
Processing 58 EXEC Program Counter B258 Instruction Register Lecture 14: Review Intro to IT
Intro to IT Connecting devices ? ?
Intro to IT Universal Serial Bus (USB)
Memory-mapped I/O C4 34 FF EXEC Program Counter 3634 Instruction Register Just like writing to a memory address 6 FF Lecture 14: Review Intro to IT
Direct Memory Access (DMA) Put some data in memory! OK Lecture 14: Review Intro to IT
Direct Memory Access Direct Memory Access means that doesn’t have to wait for the Lecture 14: Review Intro to IT
Busy Bertie the bus … Von Neumann bottleneck Lecture 14: Review Intro to IT
Intro to IT Conclusion • Assignment 2 specified sometime this week • Finish reading book!