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High Speed Image Acquisition System for Focal-Plane-Arrays. Doctoral Dissertation Presentation by Youngjoong Joo School of Electrical and Computer Engineering Georgia Institute of Technology February 12, 1999. Outlines. Introduction Background Readout system architectures
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High Speed Image Acquisition System for Focal-Plane-Arrays Doctoral Dissertation Presentation by Youngjoong Joo School of Electrical and Computer Engineering Georgia Institute of Technology February 12, 1999 HSSPG Georgia Tech
Outlines • Introduction • Background • Readout system architectures • Compact ovrsampling conversion • Photodetectors • Test • Conclusion and future work HSSPG Georgia Tech
Introduction • MotivationConventional focal-plane-arrays (FPAs) readout methods are not suitable for some scientific and engineering applications. • Low readout speed 1MHz 1000X1000 14 bit images 62THz • Not scalable depending on the readout architecture • Noise sensitive HSSPG Georgia Tech
Introduction • ObjectiveDesign a new high speed scalable image acquisition system for FPAs. • High frame rates (> 100kfps) • Scalable • Low noise HSSPG Georgia Tech
Readout Systems A/D Converters DSP Photo detectors Background • Block diagram HSSPG Georgia Tech
Photo detectors • Generate electronic signals and are located at the front end of the image acquisition system. • Hybrid integration • High responsivity • High fill factor • Substrate must be transparent • Higher fabrication cost HSSPG Georgia Tech
Photo detectors • Monomaterial integration • Compatibility with integration on-chip electronics • Low cost • Low absorption coefficient HSSPG Georgia Tech
A/D converters • What is important for the focal-plane-applications?Size, robustness, variable resolution • Conventional A/D convertersFlash ADC , Successive Approximation ADC Single slope ADC, Cyclic ADC, Oversampling ADC HSSPG Georgia Tech
A/D converters *) modulator only HSSPG Georgia Tech
Readout systems • Support an optimum interface between the detectors and the following signal processing stage. HSSPG Georgia Tech
Readout systems • Serial readout system • Noise reduction • Not scalable • Slow readout speed • Semi-parallel readout system • Increase the readout speed • Less sensitive to noise at the analog signal path HSSPG Georgia Tech
Readout system architecture • Fully parallel readout system was designed as a scalable FPA readout system HSSPG Georgia Tech
Emitter driver 01010010 Emitter 01010010 01010010 Detector 01010010 SIMPil processor Comparator Receiver Readout system architecture • Signal path from image detector to signal processor HSSPG Georgia Tech
Readout system architecture • Two layer FPA system photomicrograph HSSPG Georgia Tech
Readout system architecture • Readout speed comparison with same ADCs 64 HSSPG Georgia Tech
Readout system architecture • Readout speed comparison with different ADCs 15bits 4GHz 288 X 288 168MHz HSSPG Georgia Tech
Oversampling clock fS Nyquist clock fN 1-bit stream Analog input Noise shaping modulator Decimator and Digital LPF PCM Compact oversampling conversion • Oversampling ADC Oversampling converters trade speed for accuracy HSSPG Georgia Tech
Signal Signal PSD PSD In band quantization noise Removed by low pass filtering Quantization noise f0 f0 fS/2 fS/2 Freq. Freq. Compact oversampling conversion • Quantization noise of oversampling modulator Each doubling of the sampling frequency decreases the in-band noise by 3 dB. HSSPG Georgia Tech
PSD 1st order quantization noise 2nd order quantization noise Modulation noise f0 fS/2 Freq. Compact oversampling conversion • Modulation noise of higher order oversampling modulator Each doubling of the sampling frequency decreases the in-band noise by (3+6n) dB. HSSPG Georgia Tech
Compact oversampling conversion • Current input oversampling modulator • Oversampling loop linearity is improved. • Amplifiers are removed from the feedback. • Linear D/A conversion is available. HSSPG Georgia Tech
Compact oversampling conversion • Current buffer • Low input impedance • Stabilize the detector bias voltage HSSPG Georgia Tech
Metal 3 Current in Metal 2 Metal 1 GND Current in Integrator Compact oversampling conversion • Current D/A converter • Integrator HSSPG Georgia Tech
Output signal Input signal Compact oversampling conversion • Comparator (G. M. Yin) Sampling rate : 100MHz, Input signal : 0.1V 10MHz HSSPG Georgia Tech
Integrator Current buffer & Photo detector Integrator & Current DAC Comparator Compact oversampling conversion • Overall system HSSPG Georgia Tech
Integrator output voltage PDF [dB] 50 kHz input signal Modulator output Modulation noise Freq. Compact oversampling conversion • Overall system simulation results HSSPG Georgia Tech
edi eci + xi + wi yi Delay - Compact oversampling conversion • Circuit noise attenuation where, edi= detector, current buffer, and current D/A converter noise and eci= quantization and comparator noise. HSSPG Georgia Tech
Compact oversampling conversion • Layouts • To make a large detector, all the effort were applied to design a compact circuit. • Input parts of the circuits were carefully designed not to overlapped with digital lines. • To reduce the offset and improve the switching time of the comparator, all the components were carefully layout to make a matched comparator. • When the capacitor was laid-out, metal 1 and metal 3 layers were connected to the GND to prevent the metal-substrate capacitor. • The latch transistor size was optimized to drive a high capacitor load which is connected to several pixels through a long data line. HSSPG Georgia Tech
Circuits Circuits Detector Capacitor Pad Capacitor Compact oversampling conversion • Photomicrographs HSSPG Georgia Tech
Photodetectors • Hybrid detectors 8X8 detectors top contact HSSPG Georgia Tech
GND Vbias p+ n+ p+ n+ p+ p Vbias n+ p+ Photodetectors • Monomaterial detectors HSSPG Georgia Tech
8X8 detectors test structures emitter driver Photodetectors • Monomaterial detectors HSSPG Georgia Tech
Test • Test setup • Arbitrary waveform generator (AWG2041) • DC current sources (Keithley SMU 236) • Sampling oscilloscope (Tektronix 11403A) • Transient capture oscilloscope (Tektronix • Multi-function optical meter (Newport 1835-c) • Digital data acquisition card (CYDIO 192T) • 50MHz 486 processor • 233MHz Pentium processor • Newport coated ND filters HSSPG Georgia Tech
Oscilloscope DC current source 1.000uA 2.013V Test • Electrical testing • Verify the functionality of the circuit HSSPG Georgia Tech
Test • Electrical testing results Input = 0.03A Input = 0.06A HSSPG Georgia Tech
1 1 2 11 8 6 4 1 1 2 5 8 11 11 5 1 1 4 16 10 16 16 16 2 5 4 10 16 16 16 16 1 3 5 16 16 16 16 16 1 3 3 8 16 16 16 10 0 1 2 2 10 16 11 11 1 1 0 2 2 6 4 4 1 Test • Slow speed testing setup HSSPG Georgia Tech
Test • Slow speed testing : sampling rate=1MHz HSSPG Georgia Tech
Test • Uniformity Low light intensity High light intensity HSSPG Georgia Tech
Saturation 6 bit range Test • Linearity 64 pixels data 6 bits linearity HSSPG Georgia Tech
Measured data Test data Test • Nonlinearity • The nonlinearity of the small light intensity was not coming from the FPA system but the optical filter. • The nonlinearity of the high light intensity was coming from the saturation of the system HSSPG Georgia Tech
Test • System noise The system noise is over than 8 bits. HSSPG Georgia Tech
Test • High speed testing To obtain a 8 bit 100kfps image : • oversampling ratio : 26 • modulator bandwidth : 2.6 MHz • System bandwidth : 167 MHz HSSPG Georgia Tech
Test • Modulator 2 MHz 4 MHz HSSPG Georgia Tech
Test • Output with 2.5MHz system frequency. Room light Microscope light HSSPG Georgia Tech
Test • Output with 40MHz system frequency. Room light Microscope light HSSPG Georgia Tech
Test • Output with 100MHz system frequency. Room light Microscope light HSSPG Georgia Tech
Conclusion and future works • A new high speed readout system for FPAs were designed and tested. • A new readout architecture was designed. • A new current input first-order sigma-delta A/D modulator was designed. • Two kinds of photo detectors were utilized. • Several tests had been done to verify the proposed system. HSSPG Georgia Tech
Conclusion and future works • To complete the fully parallel readout system for FPAs, two things need to be tested and verified. • Test the speed of the through-wafer optical communication. • Test with a microprocessor. • The focal-plane-array chip and the microprocessor chip need to be stacked and test together. HSSPG Georgia Tech
Whole system HSSPG Georgia Tech