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MWPC Test System Status for LHCb Muon System

This paper presents the status of the test system for the Multi Wire Proportional Chambers (MWPC) in the LHCb Muon System. The goal is to provide a friendly and automatic procedure for diagnosing errors in the chamber and electronics system. The paper discusses the chamber design and front-end electronics, test setup and description, results, cross-check using cosmics, and conclusions.

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MWPC Test System Status for LHCb Muon System

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  1. Statusof theTest Systemof the MWPCfor theLHCb Muon System Andre’ Massafferri (Universita’ Tor Vergata – INFN sezione II - Roma) V. Bocci, R. Nobrega (Universita’ La Sapienza – INFN sezione I - Roma) G. Carboni, E. Santovetti (Universita’ Tor Vergata – INFN sezione II - Roma) IEEE San Diego 2006

  2. Muon Detectors Calorimeters Tracker RICH-2 Iron Filters Magnet RICH-1 Vertex Locator 5 Muon Stations  Chamber MWPC in Muon System LHCb: an experiment for precise measurements of CP violation and B mesons rare decays • MWPC task • Fast muon triggering • Muon identification • 5 Stations divided in 4 Regions • 19 different geometries • 1368 chambers • More than 120K channels

  3. Goal Friendly and automatic procedure for diagnose of errors of the Chamber + Electronics system Check of our 1368 MWPC (~ 128000 channels) before installation Database for Online Monitoring Topics 1 - Chamber & Front-End Electronic (FEE) 2 - Test setup and description 3 - Results 4 - Cross check using cosmics 5 - Conclusion

  4. MWPC Sandwich MWPC Design • 40 pF < Cdet < 220 pF (geometry) • Wire (Anode) & Pad (Cathode) readout • 4-gaps MWPC • gap size: 5 mm (wire plane centered) • gas mixture: Ar/CO2/CF4 (40:55:5) • wire spacing: 2 mm, mechanical tension: 65 gr • HV = 2.650 KV • gas gain: G ≈ 50 000 • gain uniformity: ≤ 30% M3R3 panel M5R3 full equipped 6 FEEs Faraday cage Single pad

  5. The acquisition basic unit OR OR Chamber & Front-End Electronics (FEE) Chamber: 2 bigaps Spark protection board Single pad Ch A LVDS READOUT Ch(AB) CONTROL logic SPB Ch B CONTROL 2 CARIOCAs + DIALOG = FEE (CARDIAC) • DIALOG: 16 chs control chip • 8-bits DACs for threshold voltage • width and delay adjustment • masking • 24-bits scaler • pulse injection feature • access via LVDS-based I2C protocol • CARIOCA: 8 chs current-mode Ampl • signal amplification • tail cancellation • base line restoration • digitalization into LVDS lines

  6. FEE characteristic I Anode Q > 14 fC Cathode Q > 8 fC charge µ signal Capacitance (pF) Qth noise Min Det charge dead region time Capacitance (pF) AFTER TESTFEE DATABASE • Band-width: 10 / 25 MHz depending on Polarity • Sensitivity: 16 to 8 mV/fC • ENC: 0.3 to 2 fC • Min Detectable charge: about 40 mV/sens Capacitance (pF)

  7. FEE characteristic II • The Discriminator Differential Threshold Voltage • Less sensitive to Noise • Vth Nominal: 0 to 1.3 V • Vth Effective Abs(VrefA – VrefB) • VrefA & VrefB obtained from Vth Nominal • OffSet • (Vth Nominal @ Min Vth Effective) • 740 to 860mV VrefA VrefB Vth Eff VthNominal Noise Rate Rate method Analysis of Noise X Threshold offset VthNominal

  8. Test Setup • Full Equipped Chamber (UNDER TEST) • Control FEE via I2C (Service Board & CANopen) • Internal Counters (Dialog feature) • External Counters (ACQ & Gate Boards and USB-VME) • BarCode Reader UNDER TEST FEE MWPC • PC (WIN, Visual C++ & ROOT) • Barcode and Test Program FEE FEE FEE 8X USB 16X Service Board (SB) controls FEE in the experiment. ACQ is a 64-channels VME module used as external counter. Gate Board translates the SB gate signal sent to the FEE to be used also by the ACQ. Gate Board Task FEE input LVDS ACQ TTL output

  9. The Test Protocol SOFTWARE GOAL USER TASK Association of Chamber to FEE boards LOCATION DATABASE Extraction of Chamber and FEE parameters Read the Chamber and FEE barcodes In dressing area (1) Preparation Check LVDS output line Check Chamber-FEE association Search for Dead Channels Estimate Cdet (Rate Method) Search for Short-Circuit Search for Open Channels Check Level Noise @ 3 specific thresholds Press Initialize In test area (2) Test Procedure Complete Test Read Chamber barcode

  10. First Step Check LVDS output line Cable Checking Check if cables are swapped It can be useful to check cables in pit Pulse Injection Test Check if FEE is working properly (pulse injection, internal counters, output lines) Inject 500 pulses to all channels Reading by dialog & ACQ counters Comparison

  11. Second Step Check Chamber-FEE association Search for Dead Channels Threshold Scan Test Check the Position of FEE comparison of OFFSET values obtained here to the ones found on FEE database Check dead FEE channels by the simple existence of Noise (min 3 pts)

  12. Third Step: Cdet Estimate Cdet (Rate Method) Search for Short-Circuit Search for Open Channels Threshold Scan Test The detector capacitance determines the noise level since it acts as a series noise source SPB 2 nF -Vth2 2 ENV2 Rate= Nexp bigap Noise fit functions offset Min Det signal ENC(Cdet) Sensitivity(Cdet) Offset & Min detect signal Cdet ENV Short-Circuit : Noise (2nF)~Noise (300pF) saturation due CARIOCA band-width Open Channel : Cdet ~ 0pF easy to discriminate even for M2R2 40pF

  13. + - Third Step: Cdet Criteria <Cdet>s D1 channels Cdet D2 Mostly associated to setup itself D1 > 2.5 s D2 > 3 s or ERROR Cdet > 300 pF or Cdet < 20 pF Very important Alarms !

  14. Fourth Step Check Level Noise @ 3 specific thresholds Criteria for Noise Rate at 3 specific Thresholds OK / WARNING/ ERROR if Rate > 1 KHz Electronic Noise can be ~100 Hz / channel 1 KHz in Noisy channels is acceptable Chamber Eff >99% @ Th = 8 fC (cathode) & 14 fC (anode) threshold Cathode Readout: 6 7 8 fC Anode Readout: 10 12 14fC

  15. Raw-Noise file • All points in Threshold Scan • Can be used for further re-analysis and comparisons Results Format: DATABASE PLots & Histograms Diagnostic file • Histograms of the main output parameters • Graph of the Noise X Thr of all FEE/channels • OffSet signature • Vertex position (cross of each combination of two channels) • Acquisition facility: any threshold/gate-time/ bigap-logic • PLOT • Detailed description of all steps through the pre-defined ranges of: OKs , Warnings, Errors messages Output file • List of 33 relevant parameters, including FEE database. • Allow further comparisons Leds & Buttons Info: Where is the problem ! OK Warning ERROR

  16. Results: First Chambers tested @ LNF 100 - M5R4 Cdet (sim) = 220 pF 22 - M3R3 Cdet (sim) = 140 pF 06 - M5R2 Cdet (sim) = 120 pF Cdet 128 - chambers About 10% needed some intervention pointed out by the Test System Mostly Change FEE (dead,noisy) Also bad connection, SPB, I2C (chain) Alarms ! We upgrade MaxNoiseRate = 20 MHz to detect it Those tests were performed using a MaxNoiseRate cut = 2 MHz Recently we have observed a FEE patology that distorted the Th-Scan at high Noise Rate

  17. More Plots: M5R4 &M3R3 &M5R2 OffSet Noise @ th = 10 fC & 6 fC 10 KHz Noise @ th = 12 fC & 7 fC Noise Rate of 4 M5R4 chambers 12 CARDIACs @ th = 14fC 1 KHz Noise @ th = 14 fC & 8 fC 100 Hz

  18. Cross-Check using Cosmics • Cosmic Acquisition is being done at CERN on chambers tested in LNF HV scan, gas, Operational Threshold & signal coincidence between 2 Bigaps 15 M5R4 analysed up to now 100% of the defects found were successfully detected by the Upgraded Test System High Cdet signature More Statistic (mainly with other chamber types) must be collected 2 chambers without PLATEAU Low Eff channel

  19. Conclusions • Automatic and fast (5-10 minutes) system has been implemented to be used also for non-experts • System has shown to be very effective on 130 INFN chambers tested: fundamental guide to fix problematic chambers (10%) • Cosmic Acquisition pointed an unexpected kind of problem in 0.5% of the channels. A retest using the Upgraded version of Test System has been able to discriminate all those channels • Now we have 4 systems operating: CERN (2), LNF (1) and in the pit (1) • We aim to minimize drastically the installation of chambers with problems

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