Virtual Memory

1. Virtual Memory Fred Kuhns (fredk@arl.wustl.edu, http://www.arl.wustl.edu/~fredk) Department of Computer Science and Engineering Washington University in St. Louis

2. Virtual Memory - A Preview • Application is allocated a large virtual address space. • Requires virtual to physical address translations • Machines offer either continuous virtual address space or a segmented one. • HW enforced Memory protection • Can be implemented in HW (pages) or SW (memory overlays). Cs422 – Operating Systems Organization

3. page2 page1 page0 page1 page2 pagen page0 Frame 7 Frame 6 page3 pagen Frame 0 Frame 1 page3 Frame 2 Frame 3 Frame 4 Frame 5 An Example: Paged Virtual Memory Working set Physical address space P1 virtual address space P2 virtual address space resident Address Translation Non-resident Cs422 – Operating Systems Organization

4. Text (shared) Initialized Data Unitialized Data Heap (Dynamic) stack (dynamic) Environment Example Paging System CPU Unitialized data Stack and heap DRAM Allocated virtual pages Low Address (0x00000000) Swap app1 Address space Disk UFS High Address (0x7fffffff) Text and initialized data app1 Cs422 – Operating Systems Organization

5. Typical UNIX VM Architecture • File Mapping - Fundamental Organizational scheme • Types of Mappings: Shared and Private • Has an OO Flavor • Memory Object represents mapping from physical page to data object • Integrated with vnodes • FS provides name space Cs422 – Operating Systems Organization

6. process process File Mapping - read/write interface VM Approach Traditional Approach Process P1 Process P1 mmap(): Address space read/write: Copy Copy Virtual Memory System Buffer Cache P1 pages Copy Copy Cs422 – Operating Systems Organization

7. Return to More General Material Cs422 – Operating Systems Organization

8. Paging and Segmented Architectures • Memory references are dynamically translated into physical addresses at run time • A process may be swapped in and out of main memory such that it occupies different regions • A process may be broken up into pieces that do not need to be located contiguously in main memory • All pieces of a process do not need to be loaded in main memory during execution Cs422 – Operating Systems Organization

9. Execution of a Program • Resident set: Operating system brings into main memory portions of the memory space • If processes attempts to access a non-resident page then the MMU raises an exception causing the OS to block process waiting for page to be loaded. • Steps for loading a process memory pages: • Operating system issues a disk I/O Read request • Another process is dispatched to run while the disk I/O takes place • An interrupt is issued when disk I/O complete which causes the operating system to place the affected process in the Ready state Cs422 – Operating Systems Organization

10. Advantages • More processes may be maintained in main memory • Only load in some of the pieces of each process • With so many processes in main memory, it is very likely a process will be in the Ready state at any particular time • A process may be larger than all of main memory Cs422 – Operating Systems Organization

11. Types of Memory • Types of memory: • Real memory: Main memory • Virtual memory: main plus secondary storage permitting more effective multiprogramming and reduces constraints of main memory • Paging may result in Thrashing: • Swapping out a piece of a process just before that piece is needed • The processor spends most of its time swapping pieces rather than executing user instructions Cs422 – Operating Systems Organization

12. Exploiting the Principle of Locality • Programs tend to demonstrate temporal and spatial locality of reference • Only a few pieces of a process will be needed over a short period of time • Possible to make intelligent guesses about which pieces will be needed in the future • This suggests that virtual memory may work efficiently • Working set model: • Assumes a slowing changing locality of reference • Set periodically changes • resident set size versus fault rate • may set high and low thresholds Cs422 – Operating Systems Organization

13. Virtual Memory Support • Hardware must support paging and/or segmentation • Operating system must be able to manage the movement of pages and/or segments between secondary memory and main memory Cs422 – Operating Systems Organization

14. Paging • Virtual and physical memory divided into fixed size pages • Page tables translate virtual page to a physical page. • The entire page table may take up too much main memory • Page tables are also stored in virtual memory • When a process is running, part of its page table is in main memory • Problem: translating every address is expensive requiring possibly several memory access • Solution is to use a cache of recently mapped addresses, the translation lookaside buffer: • Managing the pages in memory • Pages marked as resident or non-resident • non-resident pages cause page faults • Policies: • Fetch, Placement, Replacement Cs422 – Operating Systems Organization

15. General HW Requirements for Paging • Prevent process from changing own memory maps • CPU distinguishes between resident and non-resident pages • Load pages and restart interrupted program instructions • Determine if pages have been modified Cs422 – Operating Systems Organization

16. Address Translation - General CPU virtual address cache MMU Physical address data Global memory Cs422 – Operating Systems Organization

17. Memory Management Unit • Translates Virtual Addresses • page tables • Translation Lookaside Buffer • Page tables • One for kernel addresses • one or more for user space processes • Page Table Entry (PTE) one per virtual page • 32 bits - page frame, protection, valid, modified, referenced Cs422 – Operating Systems Organization

18. Address Translation • Virtual address: • virtual page number + offset • Finds PTE for virtual page • Extract physical page and adds offset • Fail (MMU raises an exception - page fault): • bounds error - outside address range • validation error - non-resident page • protection error - not permitted access Cs422 – Operating Systems Organization

19. MMU details • Limit PT size: • segments • page the page table (multi-level page table) • MMU registers point to the current page table(s) • kernel and MMU can modify page tables and registers • Problem: • Page tables require perhaps multiple memory access per instruction • Solution: Translation Lookaside Buffer (TLB) • rely on HW caching (virtual address cache) • cache the translations themselves - TLB Cs422 – Operating Systems Organization

20. TLB Details • Associative cache of address translations • Entries may contain a tag identifying the process as well as the virtual address. • Why is this important? • MMU typically manages the TLB • Kernel may need to invalidate entries, • Would the kernel ever need to invalidate entries? Cs422 – Operating Systems Organization

21. Translation Lookaside Buffer • Contains page table entries that have been most recently used • Functions same way as a memory cache • Given a virtual address, processor examines the TLB • If present (a hit), the frame number is retrieved and the real address is formed • If not found (a miss), page number is used to index the process page table Cs422 – Operating Systems Organization

22. context table pointer context Address Translation Overview MMU Virtual address CPU physical address cache TLB Page tables Cs422 – Operating Systems Organization

23. offset in page virtual page number R frame number M control bits Page Table Entry • Resident bit indicates if page is in memory • Modify bit to indicate if page has been altered since loaded into main memory • Other control bits, for example dirty bit • frame number, this is the physical frame address. Y bits X bits Virtual address Page Table Entry (PTE) Z bits Cs422 – Operating Systems Organization

24. offset in page virtual page number Example 1-level address Translation Virtual address DRAM Frames 12 bits 20 bits Frame X X offset add PTE control bits R M frame number (Process) Page Table current page table register Cs422 – Operating Systems Organization

25. SuperSPARC Reference MMU Physical address Physical page offset Context Tbl Ptr register Context Tbl 12 Bits 24 Bits PTD Level 1 Level 2 PTD Level 2 PTD Context register 12 bit PTE 6 bits 8 bits 6 bits 12 bits Virtual address 4096 index 1 index 2 index 3 offset virtual page • 12 bit index for 4096 entries • 8 bit index for 256 entries • 6 bit index for 64 entries • Virtual page number has 20 bits for 1M pages • Physical frame number has 24 bits with a 12 bit offset,permitting 16M frames. Cs422 – Operating Systems Organization

26. Page Table Descriptor/Entry Page Table Descriptor type Page Table Pointer 2 1 0 Page Table Entry ACC M R C type Physical Page Number 8 7 6 5 4 2 1 0 Type = PTD, PTE, Invalid C - Cacheable M - Modify R - Reference ACC - Access permissions Cs422 – Operating Systems Organization

27. from William Stallings, “Operating Systems”, 4th edition, Prentice Hall

29. Page Size • Smaller page size, less amount of internal fragmentation • Smaller page size, more pages required per process • More pages per process means larger page tables • Larger page tables means large portion of page tables in virtual memory • Secondary memory is designed to efficiently transfer large blocks of data so a large page size is better Cs422 – Operating Systems Organization

30. Page Size • Small page size, large number of pages will be found in main memory • As time goes on during execution, the pages in memory will all contain portions of the process near recent references. Page faults low. • Increased page size causes pages to contain locations further from any recent reference. Page faults rise. Cs422 – Operating Systems Organization

31. Page Size - continued • Multiple page sizes provide the flexibility needed to effectively use a TLB • Large pages can be used for program instructions • Small pages can be used for threads • Most operating system support only one page size Cs422 – Operating Systems Organization

32. Example Page Sizes Cs422 – Operating Systems Organization

33. Segmentation • May be unequal, dynamic size • Simplifies handling of growing data structures • Allows programs to be altered and recompiled independently • Lends itself to sharing data among processes • Lends itself to protection Cs422 – Operating Systems Organization

34. Segment Tables • corresponding segment in main memory • Each entry contains the length of the segment • A bit is needed to determine if segment is already in main memory • Another bit is needed to determine if the segment has been modified since it was loaded in main memory Cs422 – Operating Systems Organization

35. Segment Table Entries Cs422 – Operating Systems Organization

36. Combined Paging and Segmentation • Paging is transparent to the programmer • Paging eliminates external fragmentation • Segmentation is visible to the programmer • Segmentation allows for growing data structures, modularity, and support for sharing and protection • Each segment is broken into fixed-size pages Cs422 – Operating Systems Organization

37. Combined Segmentation and Paging Cs422 – Operating Systems Organization