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SERIAL COMMUNICATION INTERFACE (SCI)

SERIAL COMMUNICATION INTERFACE (SCI). Module Objective. Understand serial communications format Understand serial communications options Configure SCI for desired baud rate Set desired character bit length and parity Enable transmitter, receiver and interrupt control

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SERIAL COMMUNICATION INTERFACE (SCI)

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  1. SERIALCOMMUNICATIONINTERFACE(SCI)

  2. Module Objective • Understand serial communications format • Understand serial communications options • Configure SCI for desired baud rate • Set desired character bit length and parity • Enable transmitter, receiver and interrupt control • Transmit and receive data • Module exercise: Configure the SCI to transmit and receive characters to/from another device under interrupt control.

  3. IRQ LVI Direct Memory Access Module (DMA) System Integration Module (SIM) Clock Generation Module (CGM) Timer Interface Module (TIM) 68HC08 CPU RESET COP BREAK Internal Bus (IBUS) Random Access Memory (RAM) Serial Peripheral Interface (SPI) Electronically Programmable ROM Monitor ROM Serial Communications Interface (SCI) Serial Communication Interface Module • Full duplex high-speed asynchronous • Programmable 8 or 9 bit character lengths • Two receiver wakeup methods • Separate Receiver and Transmitter DMA Service Requests • Separate Receiver and Transmitter CPU Interrupt Requests • Separately Enabled Transmitter and Receiver • Programmable Transmitter Output Polarity • Interrupt-driven operation with Eight Interrupt Flags: • Transmitter Empty • Transmission Complete • Receiver Full • Idle Receiver Input • Receiver Overrun • Noise Error • Framing Error • Parity Error • Low power operation mode • Receiver Framing Error Detection • Hardware Parity Checking

  4. SHIFT REGISTER Double Buffering RECEIVER: TRANSMITTER: DATA IN DATA T8 TDR BUFFER IN DATA RDR BUFFER SHIFT REGISTER R8 OUT DATA OUT • • SCTE Flag sets each time SCRF Flag sets each time new data is transferred from new data is transferred from the TDR Buffer to the the serial shift register to the transmit serial shift register. RDR Buffer. WRITE to SCDR writes TDRx Buffer READ to SCDR reads RDRx Buffer

  5. 8 - Bit Data Format (10 bit total length) NEXT START START BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT BIT Extra Stop Bit or Parity Bit 9 - Bit Data Format (11 bit total length) NEXT START START BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 STOP BIT BIT Extra Stop Bit or Parity Bit Serial Communications Basics SCI Data Formats

  6. Serial Communications Basics • Special Data Characters Break - Has no Start or Stop bits, exists as a logic zero for 10 or 11 bit times ( 8 or 9 data format respectively ) Idle - Has no Start or Stop bits, exists as a logic one for 10 or 11 bit times ( 8 or 9 data format respectively ) Preamble - A synchronizing Idle character

  7. SCI I/O Registers • Seven I/O registers control and monitor SCI operation • SCI Control Register 1 (SCC1) • SCI Control Register 2 (SCC2) • SCI Control Register 3 (SCC3) • SCI Status Register 1 (SCS1) • SCI Status Register 2 (SCS2) • SCI Data Register (SCDR) • SCI Baud Rate Register (SCBR)

  8. READ: SCP1 SCP0 SCR2 SCR1 SCR0 SCBR WRITE: RESET: 0 0 0 0 0 0 0 0 Baud Rate Selection • SCI Baud Rate Register • Selects baud rate for SCI transmitter • SCI baud rate prescaler bits (SCP1,SCP0) • Divide crystal frequency by multiple of 64 1, 3, 4, or 13 • SCI baud rate select bits (SCR2 - SCR0) • Selects transmit baud rate from prescaler output • Divide prescaler output frequency 1, 2, 4, 8, 16, 32, 64, or 128

  9. Prescaler Table (Crystal Frequency = 4.9152 MHz) SCP1 SCP0 Divisor Maximum Baud Rate 0 0 1 76.80K Baud 0 1 3 25.833K Baud 1 0 4 19.20K Baud 1 1 13 5.908K Baud Highest Baud Rate (from prescaler table) Crystal Frequency = 4.9152 Mhz 76.80K Baud 19.20K Baud SCR2 SCR1 SCR0 Divisor 0 0 0 1 76.80K Baud 19.20K Baud 0 0 1 2 38.40K Baud 9600 Baud 0 1 0 4 19.20K Baud 4800 Baud 0 1 1 8 9600 Baud 2400 Baud 1 0 0 16 4800 Baud 1200 Baud 1 0 1 32 2400 Baud 600 Baud 1 1 0 64 1200 Baud 300 Baud 1 1 1 128 600 Baud 150 Baud Baud Rate Selection Example:

  10. READ: SCC1 LOOPS ENSCI TXINV M WAKE ILTY PEN PTY WRITE: RESET: 0 0 0 0 0 0 0 0 READ: • SCTIE TCIE SCRIE ILIE TE RE RWU SBK SCC2 WRITE: RESET: 0 0 0 0 0 0 0 0 SCI Transmitter Configuration & Interrupts • Parity Enable (PEN) • 1 = Enable • 0 = Disable • Parity Type (PTY) • 1 = Odd Parity • 0 = Even Parity • SCI Enable (ENSCI) • Enable SCI and SCI baud rate generator • Allows SCI to be disabled for lower power • 1 = SCI enabled • 0 = SCI disabled • Character Length Select (M) • 1 = 9-bit SCI characters • 0 = 8-bit SCI characters • Transmitter Enable (TE) • Enables transmission operation • Sends preamble 1 = Enable transmitter 0 = Disable transmitter • SCI Transmit Interrupt Enable (SCTIE) • Interrupt on Transmit Data Register becoming empty • Next byte can be loaded into transmit data register • 1 = Enable interrupt • 0 = Disable interrupt • Transmission Complete Interrupt Enable (TCIE) • Interrupt on Transmit Complete • A byte has just been sent • 1 = Enable interrupt • 0 = Disable interrupt

  11. Character Length M PEN PTY 0 0 x 1 start + 8 (7) data + 1 (2) stop 1 0 x 1 start + 9 (8) data + 1 (2) stop 0 1 0 1 start + 7 data + Even +1 stop 0 1 1 1 start + 7 data + Odd +1 stop 1 1 0 1 start + 8 data + Even +1 stop 1 1 1 1 start + 8 data + Odd +1 stop Character Length Selection

  12. Initialization Flow Diagram Configure M, PEN, and PTY Calculate baud Enable SCI

  13. SCTE TC SCRF IDLE OR NF FE PE READ: SCS1 WRITE: RESET: 1 1 0 0 0 0 0 0 READ: R7 R6 R5 R4 R3 R2 R1 R0 SCDR WRITE: T7 T6 T5 T4 T3 T2 T1 T0 RESET: UNAFFECTED BY RESET Transmitter Status Flags • SCI Data Register (SCDR) • Buffers data for the transmit/receive shift registers • Writing to the SCDR writes data to be transmitted • Initiates transmit operation • SCI Status Register 1 (SCS1) • SCI Transmitter Empty (SCTE) • Indicates SCD register contents have been moved to transmit serial shift register • Cleared by reading SCS1 then writing to SCDR • 1 = Data register empty • 0 = Data register not empty • Transmission Complete (TC) • Indicates SCDR is empty and no transmission in progress • Cleared by reading SCS1 and then writing to SCDR • 1 = No transmission in progress • 0 = Transmission in progress SCI Data Register

  14. Transmit Flow Diagram Enable Transmitter Load Transmit Byte YES More Data? SCTE? YES NO NO Transmit Complete? Disable Transmitter

  15. Receiver, Start Bit Search

  16. Receiver, Data Bit Detect

  17. READ: • SCTIE TCIE SCRIE ILIE TE RE RWU SBK SCC2 WRITE: RESET: 0 0 0 0 0 0 0 0 SCI Receiver Interrupts & Status • SCI Status Register 1 • SCI Receiver Full (SCRF) • Indicates data in the receive shift register transferred to SCI receive data register • Cleared by reading the SCS1 and then reading the SCD 1 = Receive data available 0 = Data not available • SCI Control Register 2 (SCC2) • SCI Receive Interrupt enable (SCRIE) • Interrupt on Receive Data Register filling • Just received a transmitted byte • 1 = Enable interrupt • 0 = Disable interrupt • Receiver Enable (RE) • Enables the receiver operation • 1 = Enable receiver • 0 = Disable receiver SCTE TC SCRF IDLE OR NF FE PE READ: SCS1 WRITE: RESET: 1 1 0 0 0 0 0 0

  18. READ: R7 R6 R5 R4 R3 R2 R1 R0 SCDR WRITE: T7 T6 T5 T4 T3 T2 T1 T0 RESET: UNAFFECTED BY RESET SCI Data Register • SCI Data Register (SCDR) • Buffers data for the transmit/receive shift registers • Reading the SCDR accesses received data bits • Received data automatically placed here

  19. Receiver Flow Diagram • Receiver must already be enabled • May want to enable/disable receiver • Data reception must be synchronized SCRF? NO YES Empty Data Register More Bytes? YES NO

  20. HC08-SCIExer Contents of transmit vector = Addr. of TRANS Service Routine Contents of receive vector = Addr. of RCVService Routine 5. Load accumulator with "rcvr & xmtr enabled, SCI Data (Read=rcv, Write=xmt) Originate SCI Transmit Vector Address = $FFF2 1. Load accumulator with "2400 baud value". Originate SCI Receive Vector Address = $FFF4 9. Load accumulator with SCI receive register. 13. Store accumulator to SCI transmit register enable SCI, no parity, no wake-up value. TCIE & ILIE interrupts disabled" value. 3. Load accumulator with "8 data bit size", and rcvr & xmtr interrupts enabled, and Addresses for: Baud Rate Control register 2. Store accumulator to SCBR register. 4. Store accumulator to SCC1 register. 6. Store accumulator to SCC2 register. Enable transmitter, receiver & interrupts: SCI Control 1 register SCI Control 2 register Suggested program steps: SCI Status 1 register 7. Done, stay here. (BRA SELF) Select word length & wakeup mode: 12. Call Transmit Data Routine. SCI TRANSMITTER SERVICE: 10. Call Receive Data Routine. 11. Return from Interrupt. 14. Return from Interrupt. SCI RECEIVER SERVICE: SCI Config & Service Routine Exercise Select baud rate = 2400: CONFIGURATION: Write a routine that configures and provides service for reception and transmission of the SCI. The SCI is connected to a Modem operating at 2400 baud, 8 data bits, and is interrupt driven. routine and accesses the SCDR register with accumulator A, and returns from the interrupt. Crystal Oscillator Frequency = 4.9152 MHz. Your routine calls a Receive or a Transmit RCVEC FDB SCIRECV_IRQ TRVEC FDB SCITRAN_IRQ Write your program here: ORG $FFF4 SCDR EQU $18 ORG $FFF2 SCC1 EQU $13 SCC2 EQU $14 SCS1 EQU $16 SCBR EQU $19

  21. 9 Data Bit Transmissions- Plus Start and Stop - READ: R8 • SCI Control Register 3 (SCC3) • M bit in SCC1 set • R8 - Bit 8 ( Received ) • Ninth bit of the received character • T8 - Bit 8 ( Transmitted ) • Ninth bit of the transmitted character T8 DMARE DMATE ORIE NEIE FEIE PEIE SCC3 WRITE: RESET: U U 0 0 0 0 0 0

  22. Sending Break Signal • SCI Control Register 2 • Send Break (SBK) • Used to gain control of bus 1 = Transmit break character 0 = Do not transmit break characters READ: SCC2 SCTIE TCIE SCRIE ILIE TE RE RWU SBK WRITE: RESET: 0 0 0 0 0 0 0 0

  23. BKF RPF READ: SCS2 WRITE: RESET: 0 0 0 0 0 0 0 0 Additional Status Flags READ: SCTE TC SCRF IDLE OR NF FE PE SCS1 WRITE: RESET: 1 1 0 0 0 0 0 0 • SCI Status Register 1 • Receiver idle (IDLE) Receiver overrun (OR) • Noise Flag (NF) Framing Error (FE) • Parity Error (PE) • SCI Status Register 2 • Break (BKF) • Set when a break character is detected • Cleared by reading SCS2 then reading SCDR • Reception in Progress (RPF) • Set during start bit search • Reset after the stop bit or false start bit detected

  24. READ: R8 T8 DMARE DMATE ORIE NEIE FEIE PEIE SCC3 WRITE: RESET: U U 0 0 0 0 0 0 Additional Information- Error Interrupt Enables - • SCI Control Register 3 (SCC3) • Overrun interrupt enable (ORIE) • Noise error interrupt enable (NEIE) • Framing error interrupt enable (FEIE) • Parity error interrupt enable (PEIE)

  25. READ: SCC2 TIE TCIE RIE ILIE TE RE RWU SBK WRITE: RESET: 0 0 0 0 0 0 0 0 Additional Information- Idle Line Detection and Interrupt - READ: SCC1 • Idle Line Interrupt Enable (ILIE) • Interrupts upon idle character being detected LOOPS ENSCI TXINV M WAKE ILTY PEN PTY WRITE: RESET: 0 0 0 0 0 0 0 0 • Idle line type (ILTY) • Selects when to start timing idle character • After start or stop bit

  26. READ: R8 T8 DMARE DMATE ORIE NEIE FEIE PEIE SCC3 WRITE: RESET: U U 0 0 0 0 0 0 Additional Information- DMA Servicing - • DMA Receive Enable (DMARE) • Enable DMA to service SCI receiver interrupts (SCRF) • Disables CPU receiver interrupt • DMA Transmit Enable (DMATE) • Enable DMA to service SCI transmit interrupts (SCTE) • Disables CPU transmit interrupt

  27. READ: SCC1 LOOP ENSCI SCIB M WAKE ILTY PEN PTY WRITE: RESET: 0 0 0 0 0 0 0 0 Additional Information- Wake Up - READ: SCC2 SCTIE TCIE SCRIE ILIE TE RE RWU SBK • Wakeup Method (WAKE) • Selects wakeup criteria WRITE: RESET: 0 0 0 0 0 0 0 0 • Receiver Wakeup Enable (RWU) • Puts receiver in standby mode

  28. Receiver Wake Up • Receiver selects wake up criteria • Idle line (WAKE = 0) • Detection of idle character causes wake up • Address mark (WAKE = 1) • Detection of most significant bit set causes wake up • Most significant bit of first byte indicates an address • All remaining bytes have MSB set to logic zero

  29. Wake Up Methods

  30. Additional Information- Special Test Mode - • Loop mode operation (LOOPS) • PTE1/RxD pin is disconnected from the SCI, and the transmitter output goes into the receiver input. • Internal to SCI • Both transmitter and receiver must be enabled • Transmit Inversion Bit (TXINV) • Polarity of Transmitted data is inverted • Intended for external test and loop back READ: LOOPS ENSCI TXINV M WAKE ILTY PEN PTY SCC1 WRITE: RESET: 0 0 0 0 0 0 0 0

  31. - Low Power Modes - • WAIT • SCI module remains active • SCI registers are not accessible • Except to DMA • SCI module interrupt can wake MCU • STOP • SCI module is inactive • Can not wake MCU

  32. READ: R7 R6 R5 R4 R3 R2 R1 R0 SCD WRITE: T7 T6 T5 T4 T3 T2 T1 T0 READ: SCP1 SCP0 SCR2 SCR1 SCR0 SCBR WRITE: Register Summary READ: SCC1 LOOPS ENSCI TXINV M WAKE ILTY PEN PTY WRITE: READ: • SCTIE TCIE SCRIE ILIE TE RE RWU SBK SCC2 WRITE: READ: R8 T8 DMARE DMATE ORIE NEIE FEIE PEIE SCC3 WRITE: READ: SCTE TC SCRF IDLE OR NF FE PE SCS1 WRITE: BKF RPF READ: SCS2 WRITE:

  33. RTI RTI SCITRAN_IRQ: SCIRECV_IRQ: SCS1 EQU $16 SCC2 EQU $14 SCC1 EQU $13 SCBR EQU $19 STA SCBR STA SCC2 LDA #$AC STA SCC1 LDA #$40 LDA #$05 STA SCDR SCDR EQU $18 ORG $FFF2 LDA SCDR SELF BRA SELF JSR TXDAT ORG $FFF4 Write your program here: JSR RCVDAT TRVEC FDB SCITRAN_IRQ RCVEC FDB SCIRECV_IRQ Crystal Oscillator Frequency = 4.9152 MHz. Your routine calls a Receive or a Transmit routine and accesses the SCDR register with accumulator A, and returns from the interrupt. The SCI is connected to a Modem operating at 2400 baud, 8 data bits, and is interrupt driven. Write a routine that configures and provides service for reception and transmission of the SCI. SCI Config & Service Routine Solution CONFIGURATION: Select baud rate = 2400: 14. Return from Interrupt. SCI RECEIVER SERVICE: 11. Return from Interrupt. Suggested program steps: 10. Call Receive Data Routine. SCI TRANSMITTER SERVICE: 12. Call Transmit Data Routine. Select word length & wakeup mode: SCI Status 1 register 7. Done, stay here. (BRA SELF) SCI Control 2 register SCI Control 1 register Enable transmitter, receiver & interrupts: 6. Store accumulator to SCC2 register. 4. Store accumulator to SCC1 register. 2. Store accumulator to SCBR register. Addresses for: Baud Rate Control register and rcvr & xmtr interrupts enabled, and TCIE & ILIE interrupts disabled" value. 3. Load accumulator with "8 data bit size", enable SCI, no parity, no wake-up value. 13. Store accumulator to SCI transmit register Originate SCI Receive Vector Address = $FFF4 1. Load accumulator with "2400 baud value". 9. Load accumulator with SCI receive register. Originate SCI Transmit Vector Address = $FFF2 SCI Data (Read=rcv, Write=xmt) 5. Load accumulator with "rcvr & xmtr enabled, Contents of receive vector = Addr. of RCVService Routine Contents of transmit vector = Addr. of TRANS Service Routine HC08-SCISol

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