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Max Registers, Counters, and Monotone Circuits Keren Censor, Technion Joint work with: James Aspnes, Yale University Hagit Attiya, Technion. (Slides 18-21 were added to Keren’s original presentation. DH.). Counting. Counter: reading and incrementing operations
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Max Registers, Counters, and Monotone CircuitsKeren Censor, TechnionJoint work with:James Aspnes, Yale UniversityHagit Attiya, Technion (Slides 18-21 were added to Keren’s original presentation. DH.)
Counting • Counter: reading and incrementing operations • In sequential algorithms – one variable • Counting is critical for some programs in multiprocessing systems • Example: Algorithms for randomized consensus 0 2 1
A single register • Does not work even for 2 processes and 2 increments • An increment is not an atomic operation Register read read s1 s2 write(1) ... write(100)
Model of Shared Memory • System of n processes • Communicating through Read/Write registers R1 R2 Rm … read v write(v) ok s1 s2 sn …
Model of Distributed Computation • Crash failures: a failed process stops taking steps • Wait-free computation: an operation of a process must work even if all other processes fail • Asynchronous system: no timing assumptions • No clocks, no bound on the time between steps • Schedule (and failures) controlled by an adversary • Cannot tell whether a process is slow or failed
Model of Distributed Computation • Complexity measures: • Number of steps per operation • Amount of space • Local computation has no cost
Counter • Can be implemented using snapshots in linear time (in n) Counter +1 increment ok readCounter v
Snapshot-based counter • One single-writer register for each process • Increment by updating your register • Read by reading all the registers • Non trivial since we require linearizability R1 R2 Rn …
Goal and related work • Required: Counters with sub-linear (in the number of processes n) step complexity per operation • Lower bound of Ω(n) for time complexity by Jayanti, Tan, and Toueg [PODC 1996] and similar lower bounds by Ellen, Hendler, and Shavit [FOCS 2005] • Motivated work on approximate counting[Aspnes and C, SODA 2009]
Exact counting • Give up on sub-linear exact counting? • Or inspect lower bound more carefully: • Based on executions with many increments • But some applications use a small number of increments • We show an implementation of a bounded counter where each operation takes sub-linear time long operation
A tree-based counter Increment: recursively increment from leaf to root ReadCounter: return value at root ∑si … … +1 p1 increments pk reads update O(log n)steps to increment O(1)steps to read counter s1+...+s4 update s1+s2 s3+s4 sn-1+sn update s1 s2 s3 s4 sn …
Seems nice, but… • If each node is a multi-writer register, then even for 2 processes and 2 increments this does not work +1 +1 p1 increments Counter is incorrect +1 +1 p2 increments s1+s2 update 1 update 2 s1 s2
Max register • Replace multi-writer registers with Max Registers • In this case the tree-based counter works • If max registers are linearizable then so is counter Max Register WriteMax(v) Maximal value previously written ok ReadMax v
A tree-based counter Increment: recursively increment from leaf to root ReadCounter:return value at root ∑si … … s1+...+s4 s1+s2 s3+s4 sn-1+sn s1 s2 s3 s4 sn …
Max register – recursive construction • MaxReg0: Max register that supports only the value 0 • WriteMax is a no-op, and ReadMax returns 0 • MaxReg1 supports values in {0,1} • Built from two MaxReg0 objects • and one additional multi-writer register “switch” MaxReg0 =1 0 1 WriteMax switch ReadMax switch=0 : return 0 MaxReg0 MaxReg0 switch=1 : return 1
Max register – recursive construction • MaxRegk supports values in {0,…,2k-1} • Built from two MaxRegk-1 objects with values in {0,…,2k-1-1} • and one additional multi-writer register “switch” =1 t t WriteMax < 2k-1 ? switch = ? t t-2k-1 ReadMax t t switch=0 : return t MaxRegk-1 MaxRegk-1 switch=1 : return t+2k-1 MaxRegk
MaxRegk unfolded MaxRegk switch • Complexity does not depend on n: • WriteMaxand ReadMaxinO(k)steps … … switch switch switch MaxReg0 MaxReg0 MaxReg0 MaxReg0 MaxReg0 …
Why is this algorithm linearizable? Three operation types: • Operations on left branch: ReadMax(r) ops that read 0 from r.switch and WriteMax(r,t) with t<m that read 0 from r.switch • Operations on right branch: ReadMax(r) ops that read 1 from r.switch and WriteMax(r,t) with tm • Writes with no effect: WriteMax(r,t) ops with t<m that read 1 from r.switch
Why is this algorithm linearizable? (cont'd) Ordering operations: • Operations on left branch ordered before those on right branch • A Write with no effect linearized at latest possible time within its execution interval • Operations on left and right branch retain their linearization points (and are legal by induction hypothesis).
A tree-based counter Increment: recursively increment from leaf to root ReadCounter:return value at root ∑si … … m-valued counter: ReadCounter: O(log m)steps Increment: O(log n log m)steps s1+...+s4 s1+s2 s3+s4 sn-1+sn s1 s2 s3 s4 sn …
Analysis • Inductive linearizability proof • No contradiction with lower bound of JTT because of bounded size of max register and counter • Extension to unbounded max registers (and counters) with complexity according to value written or read • Both WriteMax and ReadMax of value v take O(min(log v, n)) steps
Unbalanced tree switch Bentley and Yao [1976] MaxReg0 switch switch switch MaxReg0 MaxReg0 switch … Leaf i is at depth O(log i) switch switch MaxReg0 MaxReg0 MaxReg0 MaxReg0
Unbounded max register switch MaxReg0 switch • WriteMax and ReadMax of vin O(min(log v, n)) steps switch switch MaxReg0 MaxReg0 … Snapshot-based counter
Lower bound of min(log m, n-1) • Sm = {executions with WriteMax operations up to value m by p1…,pn-1, followed by one ReadMax operation by pn} • T(m,n) = worst case cost of ReadMax in Sm pn reads
Lower bound of min(log m, n-1) • No process takes steps after pn so pn does not write • Reads a fixed register R. Did anyone write to R? • k = minimal such that there is a write to R in Sk • No one in Sk-1 writes to R so T(m,n)≥T(k-1,n)+1 R pn reads pn reads
Lower bound of min(log m, n-1) • In addition, consider a run in Sk that writes to R pn reads write to R by pi R write to R by pi Finish writes except by pi Execution with writes in {k,…,m} R pn reads pn returns maximal value from {k,…,m} T(m,n) ≥ T(m-k+1,n-1)+1 , we had T(m,n)≥T(k-1,n)+1 Solve recurrence: T(m,n) ≥ 1+ mink {max(T(k-1,n), T(m-k+1,n-1))}
Summary • Implementation of max registers with O(min(log v, n)) steps per operation writing or reading the value v • Sub-linear implementation of counters • Extension of counters to any monotone circuit with monotone consistency instead of linearizability
Summary • Lower bounds • An alternative proof for JTT • Tight lower bound for max registers • Randomized lower bound • Further research: randomized algorithm? Take-home message: Lower bounds do not always have the final say