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Lab3: BCD Adder Circuit Design Lab4: Z80 Simulator - Interrupts & Interrupt Handling. Lab3: BCD Adder Circuit Design Objectives 1 - Learn BCD representation . 2-Learn addition using BCD. 3-Design circuit that add two packed BCD numbers and simulate it using Proteus.
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Lab3: BCD Adder Circuit Design Lab4: Z80 Simulator - Interrupts & Interrupt Handling
Lab3: BCD Adder Circuit Design Objectives 1 - Learn BCD representation . 2-Learn addition using BCD. 3-Design circuit that add two packed BCD numbers and simulate it using Proteus .
The main points should be revised for Lab • In BCD, a digit is usually represented by four bits • Which represent the decimal digits 0 through 9 . • Addition : • 1 0 0 1 9 • 1 0 0 0 + 8 • Not 0111 • 1 0 0 0 1 = 17 • Need correction • Correction : 1 0001 + 0 0110 = 1 0 1 1 1
4008 is a 4-bit adder with carry out and carry in . • Numbers consist of Two BCD digits (packed BCD) can be added using this adder as follow : • 1- Add the first digits in the two numbers • 2- connect the carry out of first adder as • carry in to second adder and add • the second digits .
Lab4: Z80 Simulator – Interrupts & Interrupt Handling Objectives: 1 - To introduce the concept of interrupts as a means to perform Input/Output operations 2-To show the different types of interrupts usually available in microprocessors 3- To demonstrate how interrupts are handled 4- To be familiar with Z80- Simulator software
The main points should be revised for Lab • -POLLING : Regulary check for an input signal and respond when it be active . • - INTERRUPT : CPU do other works and When an input signal is active suspend it’s working and respond . • - Interrrupt is checked regularly at end of each instrucion
The Z80 microprocessor interrupt lines : - Non maskable Interrupt “-NMI” : respond to interrupt for falling edge signal and the programmer cannot disabled it . - Interrupr request ”-INT” : respond to interrupt for logic zero signal and the programmer can disable it . For interrupt request there is interrupt enable flip flop “IEFF” that have two status : Logic one : enable interrupt request using EI instruction. Logic zero : disable interrupt request using DI instruction
Non maskable Interrupt “-NMI” operation - when an –NMI occurs from any source Z80 respond as follow: 1- it disable the –INT line . 2- Save current address of PC in stack and also for registers 3- load the address 0x0066(address of interrupt service rotuine ) to PC 4- after execution of ISR , return instruction should be put to return to Main Program .
Interrupt Request “-INT” Operation - when an –NMI occurs from any source Z80 respond as follow: 1- Save current address of PC in stack and also for registers 2- load the address 0x0038 (address of interrupt service rotuine ) to PC 3- after execution of ISR , return instruction should be put to return to Main Program .
Interrupt Request Modes MODE 1 : the same as –NMI . MODE 0 , 2 : discriminating between different sources of interrupts by accepting an external data inputs .