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Nano-Electromechanical Random Access Memory (NEMRAM). Hei Kam Department of EECS, UC Berkeley May 9, 2005. Gaps in the memory space. Fast DRAM, Dense SRAM. Speed. SRAM. DRAM. Dense,Cheap Media Storage. Flash. Disk. V. Subramanian EE231 Lecture Notes. Density.
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Nano-ElectromechanicalRandom Access Memory(NEMRAM) Hei Kam Department of EECS, UC Berkeley May 9, 2005 EE241Advanced Digital ICs Final Project
Gaps in the memory space Fast DRAM, Dense SRAM Speed SRAM DRAM Dense,Cheap Media Storage Flash Disk V. Subramanian EE231 Lecture Notes Density Why New Memory Structure? • MRAM/FeRAM/PCRAM/ • ORAM? • Lacking features: • Low cost • CMOS compatible • Scalable • Reliable
Top Electrode Mechanical Nanowire Actuator (Carbon Nanotube/ Silicon Nanowire?) Air SiO2 Bottom Electrode “0” State “1” State V=0 V>Vwrite V=0 Circuit Element & Model V=0 V>Vwrite V=0 How about NEMRAM?Structure and Operation • Surface adhesion (“Stiction”) – non-volatile,no static power • Large Roff/Ron ratio - Reliable (MRAM: Roff/Ron <2)
WL Read Operation Write Operation BL BL T1 T2 precharged to Vread BL=0 BL=1 BL=0 BL=1 BL Write“1” BL BL BL Write “0” WL=1 WL=1 WL=0 WL=0 2T-1NEM SRAM: Fast DRAM, Dense SRAM • Drop-in replacement for 6T-SRAM: Similar R/W schemes • NMOS-only: Saves Area • Differential Signal Available: Noise immunity
Write Operation Read Operation Selected row Selected row Vwrite Vread Vwrite “0” “1” TWL TWL GND GND GND GND BWL BWL TWL TWL GND GND BWL BWL GND BL BL I = 0 I = Iread BL BL Cross Point (XP) NEMRAM:Media Storage • No Transistor is needed –Vertically stackable (3D), Ultra high density, Low Cost • Potential platform for Defect Tolerance Architecture
W=0.25um (min. feature size) L=0.5um • Assume constant dim. scaling • Adjust Ws for desirable result • Low pressure operation tgap=50nm tsi=25nm F/2 2F F/2 F/2 F F/2 Layout Area=6F2 Matlab Simulation results Scalability & Performance of NEMRAMArea, Vwrite tread and twrite
NEMRAM vs MRAM IEDM 2004 23.1.1
Summary • NEMRAM shows its promise as a low cost, high density and nonvolatile memory with reasonable R/W performance fills the gap in the memory space • Plus: -Long Endurance (>1012 cycles, RF MEMS Switches) -Soft Error Immunity -Unlike MRAM/FeRAM , no new material is needed -CMOS/MEMS Compatible