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State Machines. The current “state”. It is inconvenient, and often impossible, to describe the behaviour of a sequential circuit by means of a table that lists outputs as a function of the input sequence that has been received up until the current time.
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The current “state” • It is inconvenient, and often impossible, to describe the behaviour of a sequential circuit by means of a table that lists outputs as a function of the input sequence that has been received up until the current time. • To know where you are going next, you need to know where you are now. • With the TV channel selector, it is impossible to determine what channel is currently selected by looking only at the preceding sequence of presses, whether we look at the preceding 10 presses or the preceding 1000. • More information, the current “state” of the channel selector, is needed.
“state” • The state of a sequential circuit is a collection of state variables whose values at any one time contain all the information about the past necessary to account for the circuit’s future behaviour. • In the channel-selector example, the current channel number is the current state. • Inside the TV, this state might be stored as seven binary state variables representing a decimal number between 1 and 9. • Given the current state (channel number), we can always predict the next state as a function of the inputs (up/down pushes).
“finite-state machines” • In a digital circuit, state variables have binary values. • A circuit with n binary state variables has 2n possible states. • As large it might be, 2n is always finite, so sequential circuits are sometimes called finite-state machines.
D Flip-Flop with Clock input Q(t+1) = Q.D + Q.D = D.(Q +Q) = D.1 = D
Flip-flop’s next state as a function of its current state and inputs
Notation, characteristic equations • Q means “the next value of Q” or • Q(t+1) means “the next value of Q(t)” • “Excitation” is the input applied to a device that determines the next state. • “Characteristic equation” specifies the next state of a device as a function of its excitation. • S-R latch: Q = S + R´ · Q or, Q(t+1) = S + R´ · Q(t) • Edge-triggered D flip-flop: Q = D or, Q (t+1) = D (t)
Direct Inputs Often it is desirable to provide the ability to force a flip-flop into a known state without regard for the current state or the input values. For example, we may wish all flip-flops in a system to be placed in the reset state when the power is first applied to the circuit. To provide this functionality, direct inputs are provided called “Clear” and “Preset” which reset and set the device respectively. Flip-flops available in IC packages normally provide special inputs for setting or clearing the flip-flop asynchronously. They affect the flip-flop on a positive or negative value of the input signal without the need for a clock pulse i.e., asynchronously.
JK Flip-Flop with Direct Set and Reset • Direct Set - Preset • Direct Reset - Clear
Multibit registers and latches • 74x175
Synchronous State-Machine (Sequential Circuit) Analysis • State machine is a generic name given to the sequential circuits. • Clocked refers to the fact that their storage elements employ a clock input. • Synchronous means that all of the flip-flops use the same clock signal. • Clocked Synchronous State-Machine - redundant use of the word clocked. • All clocked systems are synchronous.
General structure of clocked State-machines output depends onstate and input typically edge-triggered D flip-flops
General structure of clocked State-machines • The state memory is a set of n flip-flops that store the current state of the machine, and it has 2n distinct states. • The next state of the state machine is determined by the next-state logic F as a function of the current state and input. • The output logic G determines the output as a function of the current state and input. • Both F and G are combinational logic circuits. Next state = F(current state, input) Output = G(current state, input)
Output Logic • Depending on the output logic sequential circuits are named as follows: • Mealy machine - whose output depends on both state and input. • Moore machine - whose output depends on the state alone, also called “output-coded state assignment”. • Pipelined outputs - whose outputs during one clock period depend on the state and inputs during the previous clock period.
State-machine structure (Mealy) output depends onstate and input typically edge-triggered D flip-flops
State-machine structure (Moore) output dependson state only typically edge-triggered D flip-flops
State-machine structure (pipelined) • Often used in PLD-based state machines. • Outputs taken directly from flip-flops, valid sooner after clock edge. • But the “output logic” must determine output value one clock tick sooner (“pipelined”).
State-machine analysis steps • The analysis of a sequential circuit consists of obtaining a table (state table) or a diagram (state diagram) for the time sequence of inputs, outputs, and internal states. • It is also possible to write Boolean expressions (state equation) that describe the behaviour of the sequential circuit and include the necessary time sequence.
State-machine analysis steps • Assumption: Starting point is a logic diagram. 1. Determine next-state function F and output function G. 2a. Construct state table • For each state/input combination, determine the excitation value. • Using the characteristic equation (f-f’s equation), determine the corresponding next-state values (trivial with D f-f’s). 2b. Construct output table • For each state/input combination, determine the output value. (Can be combined with state table.) 3. (Optional) Draw state diagram
The analysis of a clocked State-machine has three basic steps: • Determine the next-state and output functions F and G so that the behaviour of a circuit can be predicted. • Use F and G to construct a state/output table that completely specifies the next state and output of the circuit for every possible combination of current state and input. • (Optional) Draw a state diagram that presents the information from the previous step in graphical form.
Example state machine • A simple state machine with two positive edge triggered D flip-flops.
General structure of clocked State-machines • To determine the next-state function F, we must first consider the behaviour of the state memory. • The next-state of the D flip-flop is Q* = D • We must find the current value of D. • D0 and D1 provide the excitation for the D flip-flops: • Logic equations that express the excitation signals as functions of the current state and input are called excitation equations and can be derived from the circuit diagram: D0 = Q0.EN’ + Q0’.EN D1 = Q1.En’ + Q1’.Q0.EN + Q1.Q0’.EN
Transition equations or, next-state equations Q0* = D0 = Q0.EN’ + Q0’.EN Q1* = D1 = Q1.En’ + Q1’.Q0.EN + Q1.Q0’.EN
Transition equations • Excitation equations • Characteristic equations • Substitute excitation equations into characteristic equations
Next-state, Q1*Q0* • For each combination of current state and input value, the transition equations predict the next state. • Each state is described by two bits, the current values of Q0 and Q1: Q1Q0 = 00, 01, 10, 11 • for each state, our example machine has just two possible input values: EN = 0, 1 so, there are a total of 8 state/input combinations In general, a machine with s state bits and i inputs has 2s+istate/input combinations.
Output equations • In our example machine we have only one output: MAX = Q1.Q0.EN this is a Mealy machine The Moore-type output would be even simpler: MAXS = Q1.Q0
State diagram • A state diagram presents the information from the state/output table in a graphical format. • It has one circle (or node) for each state and an arrow (or directed arc) for each transition.
State diagram • Circles for states • Arrows for transitions (note output info)
Modified state machine • Moore machine MAXS MAXS = Q0 Q1
Summary • Detailed steps for analyzing a synchronous state machine: 1. Determine the excitation equations for the flip-flop control inputs 2. obtain transition equations 3. construct transition table using transition equations 4. determine output equations 5. create transition/output table using state/input combination 6. draw a state diagram
Timing diagram for state machine • Not a complete description of machine behavior
ABEL state diagrams Set of registered outputs GOTO or IF Output combinations Can be nested
ABEL state diagram for example machine module SMexample title ’Simple ABEL state_diagram example’ EN pin; Q1, Q0 pin istype ’reg’; MAX, MAXS pin istype ’com’; S = [Q1,Q0]; A = [ 0, 0]; B = [ 0, 1]; C = [ 1, 0]; D = [ 1, 1]; state_diagram S state A: if EN then B else A; state B: if EN then C else B; state C: if EN then D else C; state D: if EN then A else D; equations MAX = (S==D) & EN; MAXS = (S==D); end SMexample