Tektronix iLink™ Tool Set & TLA V4.3 Application Software

1. Tektronix iLink™ Tool Set & TLA V4.3 Application Software

2. Learning Objectives • Target customers • Customer applications • Customer measurement needs • Key V 4.3 features • iVerify TLA7Axx demonstration • AutoDeskew TLA5000 lab • Filtering/Coloring TLA5000 lab • Searching TLA5000 lab • Graph window TLA5000 lab • TPI.NET • Sales tools

3. Logic Analyzer Customer & ApplicationsDebug & Verify Digital Electronics Computer Systems CommunicationEquipment Other ElectronicProducts • Computers • servers & workstations • desktop & mobile PCs • Components • CPUs, chipsets & memory • motherboards • Internal Peripherals • graphics cards, disk drives • Network Information Storage • SAN, SAS, NAS • Information Appliances • PDAs, MP3, video, cameras • Mobile Base Stations • Core Network Devices • switches • relays • gateways • Enterprise Network Devices • hubs • routers • Access Devices • broadband access points • DSLAMs • modems • Military/Government • Aerospace/Avionics • Automotive • Industrial Automation • Consumer Product • Medical Technology • Education • Consumer Appliances

4. Increasing speeds of digital buses are causing decreases in timing margins and data valid windows • To acquire and measure eye diagrams on many channels PROBING ACQUISITION VISIBILITY ANALYSIS Customer Measurement Needs Application Issue Measurement Need

5. Innovation Creates ChallengesSpeeds are Causing More Signal Integrity Problems • Faster synchronous buses • Faster clock & data rates • Quicker rise & fall times • Shorter setup & hold times • Smaller data valid windows

6. Eye Diagrams Measures Data Valid WindowFaster Clocks = Smaller Eye Opening Clock Edge Setup Time Hold Time Eye opening

7. Eye Diagrams Measures Data Valid WindowSignal Integrity Problems = Smaller Eye Opening Clock Edge Setup Time Hold Time Eye opening

8. iVerify: Multi Channel Eye Diagrams TLA7Axx Logic Analyzer & TDS Oscilloscope iVerify Up to 408 Chs

9. Analog & Digital MeasurementsTLA7Axx Logic Analyzer & TDS Oscilloscope TLA Logic Analyzer iConnect MagniVu 800 MHz Clock State Acquisition Single Probe For LA & Scope Digital Meas. 2 GHzAnalogMux 8 GHzSampler 125 ps MagniVu High Resolution Timing at 16 Kb iView TDS Oscilloscope Scope Probe For Analog Meas. Up to 6 GHz Bandwidth Up to 20 GS/s Sample RateUp to 32 MB Record Length 4 Ch

10. iVerify: Multi Channel Eye DiagramsTLA7Axx Logic Analyzer & TDS Oscilloscope TLA Logic Analyzer iVerify iConnect Single Probe For LA & Scope Digital Meas. 2 GHzAnalogMux iView TDS Oscilloscope Up to 6 GHz Bandwidth Up to 20 GS/s Sample RateUp to 32 MB Record Length 4 Ch

11. iVerify™ Up to 408 Channels of High-resolution Eye Diagrams iView Logic analyzer configures the oscilloscope Oscilloscope acquires up to 3 Ch of eye diagrams (Remaining Channel is for Clock) Logic analyzer acquires eye diagram data from the oscilloscope iView iConnect Logic analyzer selects new channels to measure Loop until all channels are measured iVerify Analyze all the data at once on the logic analyzer

12. iView iConnect iVerify Demo Setup TDS/CSA 5K/6K/7K Scope TLA7Axx P6860 Probe Training Board 2

13. iVerify Setup

14. Select Channels iVerify Setup Setup – Channels

15. iVerify Setup Setup – Clock Selection/Analysis Configuration

16. iVerify AnalyzeOscilloscope Acquiring Eye Diagrams

17. iVerifyAnalysis/Display – Vertical Zoom

18. iVerifyAnalysis/Display – Horizontal Zoom

19. iVerifySeven Measurements

20. Eye Diagram MeasurementsAnalyze Up To 408 Channels of Eye Diagram Data 4-point polygon masks 6-point polygon masks Eye Limit Upper and Lower Mask Slope Horizontal Histogram Vertical Histogram

21. Eye Diagram Measurements Four Point Polygon

22. Eye Diagram Measurements Six Point Polygon

23. Eye Diagram Measurements Automatic Eye Limit Measurement

24. Eye Diagram Measurements Upper and Lower Mask

25. Eye Diagram Measurements Automatic Slope

26. Eye Diagram Measurements Vertical and Horizontal Histograms

27. Eye Diagram MeasurementsSimultaneous Multiple Measurements

28. iVerifyHighlight Single Channels to Locate Problems Quickly

29. iVerifyHighlight Single Channels to Locate Problems Quickly

30. iVerify Statistical Analysis

31. iVerify™ Requirements • TLA7Axx Logic Analyzer Module • iVerify included in V4.3 TLA Application Software • P6810, P6860, P6864 or P6880 Logic Analyzer Probe • TDS5000, TDS6000 or TDS/CSA7000 Oscilloscope • iViewTM External Oscilloscope Cable

32. iLink™ Tool SetQuickly Find & Characterize Both Analog & Digital Problems iConnect™ Single Probing iVerify™ Multi Ch Eye Diagrams iView™ Analog/Digital Display

33. PROBING ACQUISITION VISIBILITY ANALYSIS Customer Measurement Needs Application Issue Measurement Need • Increasing speeds of digital buses are causing decreases in timing margins and data valid windows • To acquire and measure eye diagrams on many channels • At higher speeds, channel-to-channel skew makes it difficult to acquire valid data • Automated adjustment of setup/hold windows on measurement tools

34. Innovation Creates ChallengesMeasuring the Data at the Right Time • Faster synchronous buses • Faster clock & data rates • Quicker rise & fall times • Shorter setup & hold times • Smaller data valid windows • It is more critical for the logic analyzer to sample the dataat the right time to acquire the correct data

35. State Acquisition ChallengeWhere is the data stable to acquire it? System Clock Edge Setup Time Hold Time Clock X Data Bus Y Data Bus

36. State Acquisition ChallengeWhere to Position the Setup/Hold Window • Where to position the TLA7Axx 625 ps or TLA5000 1500 ps Setup/Hold Window (sample point position) for each data channel Data can change State clock edge Data needs to be stable

37. Example of Data Capture ErrorsWrong Sample Point Position Y Data Bus Plot of X vs. Y X should = Y Errors are the spikes X Data Bus

38. AutoDeskewBest Setup/Hold Window Sample Position for Each Channel Changing Data Stable Data Changing Data Default Sample Position

39. AutoDeskewBest Setup/Hold Window Sample Position for Each Channel Changing Data Stable Data Changing Data

40. Setup/Hold Window Sample PositionDefaults 625ps/0s Changes to Measured Values

41. Setup/Hold Violation Window AnalysisChecks for Setup/Hold Window Violations

42. Good Data Capture Correct Sample Point Position Y Data Bus Plot of X vs. Y X = Y X Data Bus

43. AutoDeskew Violations Setup/Hold Violations Window Analysis

44. AutoDeskew Violations Setup/Hold Violations • When Setup/Hold Violation are not equal to zero • Set Trigger to Setup/Hold Violation • Apply Setup/Hold window to the trigger • Run the TLA • Display MagniVu waveforms when trigger occurs

45. AutoDeskew Violations Setup/Hold Violations Triggering Data(0) changed in the setup/hold window after 19 billon clock edges Waveforms at MagniVu 125 ps timing resolution

46. AutoDeskew Summary • Automatically sets the Setup/Hold Window Sample Position • For each channel • Choice of drag & drop manual operation • Setup/Hold Violation Window Analysis • Checks for Setup/Hold Window Violations • Trigger on Setup/Hold violations • Analyze the signal with MagniVu 125 ps resolution

47. PROBING ACQUISITION VISIBILITY ANALYSIS Customer Measurement Needs Application Issue Measurement Need • Increasing speeds of digital buses are causing decreases in timing margins and data valid windows • To acquire and measure eye diagrams on many channels • At higher speeds, channel-to-channel skew makes it difficult to acquire valid data • Automated adjustment of setup/hold windows on measurement tools • So much data… so little time • Measurement tools that allow me to specify only what I want to see

48. Filter DataLoad XDataYData.tla

49. Filter DataXData = 8 & YData = 13

50. Filter DataXData = 8 & YData = 13, YData = 9