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INTRODUCTION TO MICROPROCESSOR. Do you know computer organization?. Arithmetic Logic Unit. Input. Output. Control Unit. Memory. How does it work? Map it’s units in personal computer – Input Output Memory ALU Software – System software & Application software.
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Do you know computer organization? Arithmetic Logic Unit Input Output Control Unit Memory
How does it work? • Map it’s units in personal computer – Input Output Memory ALU Software – System software & Application software
Introduction to Microprocessor ARITHMATIC LOGIC UNIT MICROPROCESSOR CONTROL UNIT OUTPUT INPUT MEMORY MICROCOMPUTER
Microprocessor Based System µP µC INPUT INPUT OUTPUT OUTPUT MEMORY MEMORY External memory in addition to internal memory may be desired
Address, Data and Control Bus • Bus - defined pathway for transfer of digital information between different units. • To write data to memory or output device. - µp needs to send . Address of memory location or port address of device. . Data . Write control signal • To read data from memory or Input device - µp needs to send . Address and . Read Control Signal - Memory/device sends – data.
Thus three pathways (buses) for 3 types of digital information. Address Bus - From µp to devices - Unidirectional. Data Bus - From µp to devices & devices to µp - Bidirectional Control - From µp to devices & from devices to µp [Interrupt, DMA] - Bidirectional Now let us redraw the computer organization diagram
Address Bus µp Control Bus I/O Device I/O Device I/O Device Memory Data Bus
Tristate Bus Three data transmitters X, Y, Z connected to single bus Gate X Gate Z Gate Y Device X Device Z Device Y Gating Input Gating Input Gating Input Y’ X’ Z’ Bus Output Only one device should transmit at any given time
If Gate X, Gate Y and Gate Z are conventional TTL gates then – they will have only two states 0, or 1. There will always be signal at their output. Information at output point is garbled. What is required- • Y and Z should disconnect from bus when X is transmitting. • X and Z should disconnect from bus when Y is transmitting. • X and Y should disconnect from bus when Z is transmitting.
To meet above requirement Gates X, Y and Z should have following 3 output states. • Logic 1 state • Logic 0 state • A state in which output is disconnected from rest of circuit or other devices. • The third state is called High Impendence state. Such devices are called Tristate Devices. They have extra input called Disable. Input Output Disable
When disable is OFF – device functions normally as 2 state device • When disable is ON – device is disconnected from the bus
Microprocessor Data Lines Address Lines ____ IOW Clock ___ IOR _______ MEMW Clock Out ______ MEMR Reset In Wait Req Reset Out Interrupt Req Serial Input Interrupt Ack Serial Output Power DMA Req DMA Ack Ground A generalized µP chip
Why clock? What is DMA? What is Interrupt? What is serial Input? What is serial Output?