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BEPC-II Event Timing System. Ge LEI for BEPC-II timing team Institute of High Energy Physics, Beijing Mar. 2008. Brief Introduction to BEPC-II. BEPC --C onstructed in 1984 –1988; Operation 1988-2005 Single Ring collider, Beam energy: 1 – 2.8 GeV
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BEPC-II Event Timing System Ge LEI for BEPC-II timing team Institute of High Energy Physics, Beijing Mar. 2008 BEPCII Timing System
Brief Introduction to BEPC-II • BEPC--Constructed in 1984 –1988; Operation 1988-2005 • Single Ring collider, Beam energy: 1 – 2.8 GeV • Physics Run:Lum. 1031cm-2s-1 @ 1.89GeV, 5 month/year • Syn. Rad. Run:140mA @ 2.2 GeV, 3 month/year BEPCII Timing System
Design Goals of BEPCII The BEPCII continues to serve the purposes of both high energy physics experiments and synchrotron radiation applications. BEPCII Timing System
SR SR mode: outer ring (BSR) Col. mode: e+ ring (BPR) e- ring (BER) Commissioning Phase 1:Backup Scheme Phase 2:With SCQ Phase 3:With detector e e+ BEPCII Timing System
BEPCII Schedule of Commissioning -Jan. 31 Beam collision tuning with SCQ to improve the luminosity & minimize the background Feb. 26 -- One month of SR operation Mar. 26 Shutdown for detector to move in May 14 Start collision tuning with detector on line Test run of HEP experiment Dec. 2008 Lum. (1.0~3.0) 1032cm-2s-1 BEPCII Timing System
BEPC-II timing system,an event timing system BEPCII Timing System
BEPC-II timing related Parameters BEPCII Timing System
BEPC-II timing system requirements BEPCII Timing System
BEPCII timing system layout • Black boxes are timing stations • Blue lines: timing multi-mode fiber cables • Red lines: 499.8MHz reference distribution. • Greed line: 10MHz synchronizing cable from linac master osc. to ring RF osc. BEPCII Timing System
BEPCII timingstructure BEPCII Timing System
BEPCII timing system hardware • 2 EVGs, 18 EVRs • 13 VME crates and controllers, • 2 levels of fanout, 5 Fout-7 modules in total. • GUN-TX and Gun-Rx for e-gun pulser timing • 4 TD-4Vs for Kickers • 18 sets of home-made E/O and O/E for linac BEPCII Timing System
What are special in BEPCII event timing • Hardware developed • 18 sets of optical transmitting/receiving boards, for gun power supply, positron source, and 16 modulators (LI Gang, LE Qi) • Gun-Rx module modified to generate NIM outputs directly (WANG Lin) • Revolution frequency • Software • Make every bucket selectable • Fast bucket selection: a dedicated record support and device support developed for fast bucket selection BEPCII Timing System
To select any bucket • The event clock is set to 499.8MHz/5. • Reason: In EVG-200, the event clock is generated from RF divided by 4,5,6,8,10 and 12, among which only 5 is a prime numver. • event-clock/7 is set to be the sequencer clock • Reason: 7 is a common factor of BEPCII ring RF and linac RF frequnecy. • Bn = MOD(Rn*35, 396), for BEPCII colliding mode • Rn is the SequenceRAM unit number, Bn is the bucket number. • Using the above formula, any unit from 0 to 395 in SeqRAM can be mapped to one and only one bucket in the ring, which has 396 buckets in total. • The above formula can generate a table, SeqRAM unit to bucket number. Transform it to a table mapping bucket number to SeqRAM unit number. BEPCII Timing System
Map bucket number to SequenceRAM unit number(partly) BEPCII Timing System
To select any bucket • This table is put into an array of one-dimension in our dedicated record support which does the fast bucket selection. The n-th element of table gives the SeqRAM unit which generates the n-th bucket to the ring. • Similarly, we generate the mapping table for BEPCII synchronized radiation mode by Bn = MOD(Rn*35, 402) BEPCII Timing System
Fast bucket selection event timing + Beam Current Monitor • A new EPICS record support has been created to do the fast bucket selection, • Damping time consideration, bucket switch in 50Hz • protection to BCM hardware • process • read BCM values from reflective memory card of BI group, select a bucket of smallest bunch current • map the bucket number into corresponding SeqRAM unit, • Set event code to the above unit in SeqRAM of EVG BEPCII Timing System
bktRecord.dbd • BKSE, DBF_LONG, BER TotalBucketNumbers • BKSP, DBF_LONG, BPR TotalBucketNumbers • BKSS, DBF_LONG, BSR TotalBucketNumbers • BKTE, DBF_LONG, BER BucketInj • BKTP, DBF_LONG, BPR BucketInj • BKTS, DBF_LONG, BER BucketInj • BSEL, DBF_LONG, bucket selection method • COUN, DBF_LONG, count • CNTD, DBF_LONG, count down • DONE, DBF_LONG, all buckets done • ENKE, DBF_OUTLINK, Enable/Disable Kicker e- • ENKP, DBF_OUTLINK, Enable/Disable Kicker e+ • EVG, DBF_OUTLINK, Output SeqRAM delay to EVG • INJ, DBF_UCHAR, if is injecting • LBKT, DBF_LONG, Last Bucket injected BEPCII Timing System
bktRecord.dbd • MAX, DBF_LONG, max bcm protection value • MODE, DBF_MENU, BEPCIIoperationMode • RLPE, DBF_UCHAR, ReLoadPatternFile of BER • RLPP, DBF_UCHAR, ReLoadPatternFile of BPR • RLPS, DBF_UCHAR, ReLoadPatternFile of BSR • RMMD, DBF_MENU, ReflectiveMemoryMode • RMEO, DBF_LONG, ReflectiveMemory BER Offset for bucket 0 • RMPO, DBF_LONG, ReflectiveMemory BPR Offset for bucket 0 • RMSO, DBF_LONG, ReflectiveMemory BPR Offset for bucket 0 • SEQO, DBF_LONG, EVG SeqRAM offset for bucket 0 • TPUP, DBF_LONG, topup autoInjMinBkt BEPCII Timing System
bktRecord.dbd • PTRE, DBF_NOACCESS, BER Pattern,extra int ptre[402] • PTRP, DBF_NOACCESS, BPR Pattern,extra int ptrp[402] • PTRS, DBF_NOACCESS, BSR Pattern,extra int ptrs[402] • BCME, DBF_NOACCESS, • BCM readout for BER • extra char bcme[402] • asl ASL1, • special SPC_DBADDR, • BCMP, DBF_NOACCESS, • BCM readout for BER • extra char bcmp[402] • asl ASL1, • special SPC_DBADDR BEPCII Timing System
Multi bunch injection control BEPCII Timing System
Multi-bunch injection control • Control when to inject and when to stop • Top-off injection, a control loop • Stop injection when all buckets reach the bunch current limit • Bucket select method • The smallest the first • Next smaller than the bunch limit, according to the sequence in the injection pattern definition file • Criterion • Beam current from DCCT, or bunch current from BCM • Injection pattern definition file: ASCII files BEPCII Timing System
BCM display of 20 * 20 buckets colliding BEPCII Timing System
Revolution frequency Since our event clock is selected as 499.8MHz/5 = 99.96MHz, no way to generate revolution frequency directly by EVG/EVR with this clock rate. • Second EVG of event clock 499.8MHz/4, this method has been using from Oct 2007 to Feb. 2008, second round commissioning for colliding mode of BEPCII • Develop a revolution frequency module • Input: Ring RF 499.8MHz • Output: 499.8MHz/396 or 499.8MHz/402 • Made by an institute in Beijing • Has been working well since Feb. 2008. BEPCII Timing System
Performance: jitter of transport line beam signal (taken from TC-BCT2) to 499.8MHz RF signal is less then 16 pico seconds. On Apr. 26, 2007, last for 20 minutes. BEPCII Timing System
Acknowledgement Work done by Ge Lei, Guanglei Xu, Lin Wang, Gang Li, Wenchun Gao, etc. Thanks to the cooperation. Many thanks to the discussions and suggestions of Jukka Pietarinen (MRF Oy.) , Kazuro Furukawa (KEKB), Timo Korhonen (SLS), Dekang Liu and Liying Zhao (SSRF), Angelos Gorias and Yuri Chernousko (DLS). Special thanks to the 50Hz module from Yuri Chernousko. Many thanks to the suggestions and cooperation of the colleagues in group of AP, BI, PS Injection, RF, Linac Power Source, Linac Microwave, and detector of BEPCII project. BEPCII Timing System
Thank you! BEPCII Timing System