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Lecture 17:Exception Processing

Lecture 17:Exception Processing. Computer Engineering 211 Spring 2002. K/U. K/U. K/U. I.E. I.E. I.E. Exception processing: resume. Need to return from the exception handler to the interrupted program. Should we just use jr EPC ?. A special instruction: rfe

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Lecture 17:Exception Processing

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  1. Lecture 17:Exception Processing Computer Engineering 211 Spring 2002

  2. K/U K/U K/U I.E. I.E. I.E. Exception processing: resume Need to return from the exception handler to the interrupted program. Should we just use jr EPC? A special instruction: rfe return from exception. only restores the status register. EPC  PC: need to use jr explicitly.

  3. Exception processing: PPC resume return from interrupt: rfi . MSR[16-23, 25-27, 30-31]  SRR1[16-23, 25-27, 30-31] PC  SRR0[0-29]||00

  4. IRQ processor Keyboard 0x7fffffff Data register 0x81111114 Control register R Interrupt Driven Keyboard ISP: getchar: lw $v0, 0($s0) jr $ra

  5. IP5 IP4 IP3 IP2 IP1 IP0 SW1 SW0 00 Cause code 00 Interrupt-Handler exception-handler() { if (cause == interrupt at level 1) getchar(); } andi $t0, $k0, 0x800 beq $t0, $zero, otherinterrupt jal getchar otherinterrupt: -- --- --- noninterrupt: -- --- --- rfe jr $k1 exception-handler: mfc0 $k0, $cause mfc0 $k1, $EPC sw $k0, -4($sp) sw $k1, -8($sp) addi $sp, $sp, -8 mfc0 $t0, $status ori $t0, $t0, 0x1 mtc0 $status, $t0 andi $t0, $k0, 0x3c bne $t0, $zero, noninterrupt

  6. IP5 IP4 IP3 IP2 IP1 IP0 SW1 SW0 00 Cause code 00 .ktext 0x80000080 sw $a0, save0 sw $a1, save1 mfc0 $k0, $13 #cause mfc0 $k1, $14 #EPC sgt $v0, $k0, 0x44 bgtz $v0, done move $a0, $k0 move $a1, $k1 jal print_excp done: lw $a0, save0 lw $a1, save1 addiu $k1, $k1, 4 rfe jr $k1 .kdata save0: .word 0 save1: .word 0 Interrupt-Handler A-35, HP 0000

  7. IRQ processor Keyboard 0x7fffffff Rec. Data register 0x81111114 Rec. Control reg IE R Trans. Data Reg. 0x81111118 Trans. Control Reg. IE R 0x8111111c Transmitter Control The character typed at the keyboard is echoed back to the keyboard (and displayed). lw $t0, 0($s0) ori $t0, $t0, 0x2 sw $t0, 0($s0) #enables interrupt

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