CHAPTER 2 COMPUTER EVOLUTION

1. CHAPTER 2COMPUTER EVOLUTION CSNB123 coMPUTERoRGANIZATION Systems and Networking

2. Evolution First Generation Second Generation Systems and Networking

3. Systems and Networking

4. ENIAC • Electronic Numerical Integrator And Computer • Eckert and Mauchly • University of Pennsylvania • Trajectory tables for weapons • Started 1943 • Finished 1946 • Too late for war effort • Used until 1955 Systems and Networking

5. ENIAC (2) • Decimal (not binary) • 20 accumulators of 10 digits • Programmed manually by switches • 18,000 vacuum tubes • 30 tons • 15,000 square feet • 140 kW power consumption • 5,000 additions per second Systems and Networking

6. Systems and Networking

7. Von Neumann / Turing Machine • Stored Program concept • Main memory storing programs and data • ALU operating on binary data • Control unit interpreting instructions from memory and executing • Input and output equipment operated by control unit Systems and Networking

8. Von Neumann / Turing Machine - Example http://www.arcadefire.com/wp/wp-content/uploads/2010/10/turing11.jpg Systems and Networking

9. Von Neumann Machine - Structure Main Memory (M) Central Processing Unit (CPU) I/O Equipment (I,O) Arithmetic Logic Unit (CA) Program Control Unit (CC) Systems and Networking

10. Von Neumann / Turing Machine (2) • Princeton Institute for Advanced Studies • IAS • Completed 1952 Systems and Networking

11. IAS • 1000 x 40 bit words • Binary number • 2 x 20 bit instructions • Set of registers (storage in CPU) • Memory Buffer Register • Memory Address Register • Instruction Register • Instruction Buffer Register • Program Counter • Accumulator • Multiplier Quotient Systems and Networking

12. IAS – Structure Arithmetic-logic Unit (ALU) I/O Equipment (I,O) AC MQ Arithmetic-logic Circuits MBR Program Control Unit IBR PC Main Memory (M) IR MAR Control Signals Control Circuits Systems and Networking

13. IAS Computer - Example http://www.comsci.us/history/images/ias.jpg Systems and Networking

14. Systems and Networking

15. Universal Automatic Computer (UNIVAC) Systems and Networking

16. UNIVAC - Example http://archive.computerhistory.org/resources/still-image/UNIVAC/Univac_1.charles_collingwood.1952.102645279.lg.jpg Systems and Networking

17. Systems and Networking

18. IBM Systems and Networking

19. IBM 701 http://www-03.ibm.com/ibm/history/exhibits/701/images/141511_Large.jpg Systems and Networking

20. IBM 702 http://www.ed-thelen.org/comp-hist/BRL61-0396.jpg Systems and Networking

21. IBM 700/7000 https://upload.wikimedia.org/wikipedia/commons/thumb/b/b9/NASAComputerRoom7090.NARA.jpg/280px-NASAComputerRoom7090.NARA.jpg Systems and Networking

22. Second Generation Machine Systems and Networking

23. Transistors • Made from Silicon (Sand) • Invented 1947 at Bell Labs • William Shockley et al. • Replaced vacuum tubes • Solid State device Systems and Networking

24. Advantages of Transistors • Smaller • Cheaper • Less heat dissipation Systems and Networking

25. Transistors Based Computers • Second generation machines • NCR & RCA produced small transistor machines • IBM 7000 • DEC - 1957 • Produced PDP-1 Systems and Networking

26. Microelectronics • Literally - “small electronics” • A computer is made up of gates, memory cells and interconnections • These can be manufactured on a semiconductor Systems and Networking

27. Overall Generations of Computer Systems and Networking

28. Moore’s Law Number of transistors on a chip will double every year Systems and Networking

29. Moore’s Law (2) • Gordon Moore – co-founder of Intel • Increased density of components on chip • Since 1970’s development has slowed a little • Number of transistors doubles every 18 months Systems and Networking

30. Moore’s Law (3) • Cost of a chip has remained almost unchanged • Higher packing density means shorter electrical paths, giving higher performance • Smaller size gives increased flexibility • Reduced power and cooling requirements • Fewer interconnections increases reliability Systems and Networking

31. Growth in CPU Transistor Count Systems and Networking

32. IBM 360 series • 1964 • Replaced (& not compatible with) 7000 series • First planned “family” of computers • Similar or identical instruction sets • Similar or identical O/S • Increasing speed • Increasing number of I/O ports (i.e. more terminals) • Increased memory size • Increased cost • Multiplexed switch structure Systems and Networking

33. DEC PDP-8 • 1964 • First minicomputer (after miniskirt!) • Did not need air conditioned room • Small enough to sit on a lab bench • $16,000 • $100k+ for IBM 360 • Embedded applications & OEM • Bus Structure Systems and Networking

34. DEC PDP-8 – Bus Structure Systems and Networking

35. Semiconductor Memory • 1970 • Fairchild • Size of a single core • i.e. 1 bit of magnetic core storage • Holds 256 bits • Non-destructive read • Much faster than core • Capacity approximately doubles each year Systems and Networking

36. Intel Systems and Networking

37. Speed Up • Pipelining • On board cache • On board L1 & L2 cache • Branch prediction • Data flow analysis • Speculative execution Systems and Networking

38. Performance Balance • Processor speed increased • Memory capacity increased • Memory speed lags behind processor speed Systems and Networking

39. Logic and Memory Performance Gap Systems and Networking

40. Logic and Memory Performance Gap - Solutions • Increase number of bits retrieved at one time • Make DRAM “wider” rather than “deeper” • Change DRAM interface • Cache • Reduce frequency of memory access • More complex cache and cache on chip • Increase interconnection bandwidth • High speed buses • Hierarchy of buses Systems and Networking

41. I/O Devices • Peripherals with intensive I/O demands • Large data throughput demands • Processors can handle this • Problem moving data Systems and Networking

42. I/O Devices - Solutions • Caching • Buffering • Higher-speed interconnection buses • More elaborate bus structures • Multiple-processor configurations Systems and Networking

43. Typical I/O Device Data Rates Systems and Networking

44. Key is Balance • Processor components • Main memory • I/O devices • Interconnection structures Systems and Networking

45. Improvements in Chip Organization and Architecture • Increase hardware speed of processor • Fundamentally due to shrinking logic gate size • More gates, packed more tightly, increasing clock rate • Propagation time for signals reduced • Increase size and speed of caches • Dedicating part of processor chip • Cache access times drop significantly Systems and Networking

46. Improvements in Chip Organization and Architecture (2) • Change processor organization and architecture • Increase effective speed of execution • Parallelism Systems and Networking

47. Problems with Clock Speed and Login Density • Power • Power density increases with density of logic and clock speed • Dissipating heat • RC delay • Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them • Delay increases as RC product increases • Wire interconnects thinner, increasing resistance • Wires closer together, increasing capacitance • Memory latency • Memory speeds lag processor speeds Systems and Networking

48. Problems with Clock Speed and Login Density - Solution • More emphasis on organizational and architectural approaches Systems and Networking

49. Intel Microprocessor Performance Systems and Networking

50. Increased Cache Capacity • Typically two or three levels of cache between processor and main memory • Chip density increased • More cache memory on chip • Faster cache access • Pentium chip devoted about 10% of chip area to cache • Pentium 4 devotes about 50% Systems and Networking