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ID 711L: Getting Started with a Real-Time Kernel. Micriµm. Matt Gordon. Sr. Applications Engineer. 12 October 2010. Version: 1.1. Matt Gordon. Sr. Applications Engineer Responsible for demos and example projects Multiple articles and white papers Head of Micriµm’s training program.
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ID 711L: Getting Started with a Real-Time Kernel Micriµm Matt Gordon Sr. Applications Engineer 12 October 2010 Version: 1.1
Matt Gordon • Sr. Applications Engineer • Responsible for demos and example projects • Multiple articles and white papers • Head of Micriµm’s training program • Previous Experience • Software engineer at Micriµm • Developed device drivers and kernel ports • Bachelor’s degree in computer engineering from Georgia Tech
Renesas Technology and Solution Portfolio Microcontrollers& Microprocessors#1 Market shareworldwide * SolutionsforInnovation Analog andPower Devices#1 Market sharein low-voltageMOSFET** ASIC, ASSP& MemoryAdvanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).
Renesas Technology and Solution Portfolio Microcontrollers& Microprocessors#1 Market shareworldwide * SolutionsforInnovation Analog andPower Devices#1 Market sharein low-voltageMOSFET** ASIC, ASSP& MemoryAdvanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). 4
Microcontroller and Microprocessor Line-up • Up to 1200 DMIPS, 45, 65 & 90nm process • Video and audio processing on Linux • Server, Industrial & Automotive Superscalar, MMU, Multimedia • Up to 500 DMIPS, 150 & 90nm process • 600uA/MHz, 1.5 uA standby • Medical, Automotive & Industrial High Performance CPU, Low Power • Up to 165 DMIPS, 90nm process • 500uA/MHz, 2.5 uA standby • Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, FPU, DSC • Legacy Cores • Next-generation migration to RX R32C H8S H8SX M16C General Purpose Ultra Low Power Embedded Security • Up to 25 DMIPS, 150nm process • 190 uA/MHz, 0.3uA standby • Application-specific integration • Up to 10 DMIPS, 130nm process • 350 uA/MHz, 1uA standby • Capacitive touch • Up to 25 DMIPS, 180, 90nm process • 1mA/MHz, 100uA standby • Crypto engine, Hardware security 5
Microcontroller and Microprocessor Line-up • Up to 1200 DMIPS, 45, 65 & 90nm process • Video and audio processing on Linux • Server, Industrial & Automotive Superscalar, MMU, Multimedia All of them! • Up to 500 DMIPS, 150 & 90nm process • 600uA/MHz, 1.5 uA standby • Medical, Automotive & Industrial High Performance CPU, Low Power • Up to 165 DMIPS, 90nm process • 500uA/MHz, 2.5 uA standby • Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, FPU, DSC • Legacy Cores • Next-generation migration to RX R32C H8S H8SX M16C General Purpose Ultra Low Power Embedded Security • Up to 25 DMIPS, 150nm process • 190 uA/MHz, 0.3uA standby • Application-specific integration • Up to 10 DMIPS, 130nm process • 350 uA/MHz, 1uA standby • Capacitive touch • Up to 25 DMIPS, 180, 90nm process • 1mA/MHz, 100uA standby • Crypto engine, Hardware security 6
Benefitting from a Real-Time Kernel It is possible for developers who use a real-time kernel to complete innovative products at low cost and in relatively little time. However, in order to achieve these benefits developers must select a reliable, easy-to-use kernel, and must know how to properly use the services that the kernel offers.
Agenda • A Brief Introduction to Micriµm and µC/OS-III • Source Code and Tools • Lab 1 • Initiating Multitasking • Ports and Configuration Files • The Anatomy of a Task • Lab 2
Agenda (Cont.) • Scheduling • Interrupts and Exceptions • Lab 3 • µC/OS-III’s Services • Lab 4 • Conclusion
Key Takeaways • By the end of this session, you will … • Be familiar with the µC/OS-III API • Be capable of creating tasks with µC/OS-III • Understand how µC/OS-III schedules tasks • Know how to write interrupt handlers for µC/OS-III-based applications • Understand the services that µC/OS-III provides
An Overview of Micriµm • Founded in 1999 • Provider of high-quality embedded software • Known for remarkably clean code • Kernel, protocol stacks, file system, and GUI • Renesas example projects available
µC/OS-III • Micriµm’s latest kernel • Not a µC/OS-II replacement • Offers many features not available from µC/OS-II • Round-robin scheduling, two interrupt schemes, support for any number of tasks • Port structure is nearly identical to that of µC/OS-II
µC/OS-III, The Real-Time Kernel • Book can be purchased with one of two different Renesas boards • First part of the book describes how the kernel was implemented and how it can be used • Second part is board-specific and covers µC/OS-III example projects • Everything needed to run the kernel is provided with the book
A µC/OS-III-Based Application Application Code Micriµm’s Modules (Portable Code) Micriµm’s Modules (Hardware-Specific Code)
A µC/OS-III-Based Application (Cont.) Application Code µC/OS-III µC/CPU µC/LIB µC/OS-III µC/CPU BSP
Directory Structure µC/CPU µC/LIB BSP µC/OS-III Application Code
High-Performance Embedded Workshop (HEW) • Full-featured IDE with support for SuperH, M32R, M16C, R8C, H8SX, H8S, H8, and RX • Functionality can be extended via TargetServer • HEW example projects available from the Micriµm Web site
Lab 1 Summary • µC/OS-III is made up of multiple C source and header files • The kernel is provided as a precompiled library in most of Micriµm’s example projects • A µC/OS-III-based application looks much like any other C program • Application code interacts with µC/OS-III through the kernel’s API
Characteristics of µC/OS-III-Based Applications • main() is declared, as in any C program • Kernel API functions are invoked • At least one task is present • Tasks are C functions
OSInit() • Must be invoked before any kernel services are used • Initializes data structures • Creates internal tasks • Number of tasks depends on configuration
µC/OS-III Internal Tasks Always Present Optional Statistics Task Monitors resource usage ISR Handler Task Facilitates deferred interrupt scheme Timer Task Manages software timers • Idle Task • Automatically given lowest priority • Tick Task • Synchronized with a periodic interrupt • Allows µC/OS-III to provide time delays
Creating a Task void OSTaskCreate (OS_TCB *p_tcb, CPU_CHAR *p_name, OS_TASK_PTR p_task, void *p_arg, OS_PRIO prio, CPU_STK *p_stk_base, CPU_STK *p_stk_limit, OS_STK_SIZE stk_size, OS_MSG_QTY q_size, OS_TICK time_quanta, void *p_ext, OS_OPT opt, OS_ERR *p_err); The task itself The task’s priority A pointer to the task’s stack
Creating a Task (Cont.) • Why is OSTaskCreate() necessary? • Initialize data structures associated with the task • TCB • Stack
A Task Control Block (TCB) • Contains information on the task’s status StkPtr ExtPtr StkLimitPtr NextPtr 23 - 51 fields PrevPtr
Stacks • In µC/OS-III, each task has a stack • Context is stored on stacks • Stack growth conventions vary across platforms Higher memory addresses PSW (0x00010000) PC (p_task) R15 (0x15151515) R14 (0x14141414) R13 (0x13131313) R12 (0x12121212) R11 (0x11111111) R10 (0x10101010) R9 (0x09090909) R8 (0x08080808) R7 (0x07070707) R6 (0x06060606) R5 (0x05050505) R4 (0x04040404) R3 (0x03030303) R2 (0x02020202) p_stk R1 (p_arg) Lower memory addresses
OSStart() • Initiates multitasking by running the highest priority task • CPU registers are loaded with values from the task’s stack • Unless errors occur, should be the last function called from main()
A µC/OS-III Port • Architecture-specific code that implements context switches and other operations • At least partially implemented in assembly • Three files – os_cpu.h, os_cpu_a.asm, os_cpu_c.c
Writing a µC/OS-III Port • Best to start from a µC/OS-II port • Process described in µC/OS-III book • For Renesas devices, port may already be available from Micriµm
Additional Hardware-Specific Code µC/CPU Board Support Package (BSP) Written for a particular board Code for managing LEDs, push buttons, and other components Little or no BSP code required by µC/OS-III • Written for a particular architecture • Code for disabling interrupts, making measurements, and more • Utilized by µC/OS-III and other Micriµm modules
Configuration Files • Define numerous constants • Configuration often differs from application to application • Template files are provided with the kernel
Configuration Files (Cont.) • os_cfg.h – used to enable various kernel services • os_cfg_app.h – allows configuration of kernel tasks • os_type.h – defines data types used by the kernel
Task Basics • A task is a C function • Most tasks are periodic • Tasks cannot return • Tasks are managed by the kernel
A Template Task static void App_TaskExample (void *p_arg) { Perform initializations; while (1) { Work toward task’s goals; } }
Lab 2 Summary • Tasks can be created via calls to OSTaskCreate() • Only one task should be created in main() • Each task has its own stack • A priority must be assigned to each task
Two Types of Multitasking • Scheduling differs from kernel to kernel • There are two common approaches to scheduling multiple tasks • Cooperative scheduling • Preemptive scheduling
Cooperative Scheduling Interrupt signals the availability of Task A’s data ISR Task A Task A cannot run until Task B completes Task B Time
Preemptive Scheduling Interrupt signals the availability of the high-priority task’s data ISR The high-priority task is scheduled by the kernel High-Priority Task Low-Priority Task Time
Round-Robin Scheduling Task A Task B Task C Time Quantum Time
Scheduling in µC/OS-III • µC/OS-III is preemptive • The scheduler’s objective is to run the highest priority ready task • A table of task priorities is used • Round-robin scheduling is performed when enabled
A Context Switch Switch from Task A to Task B Save stack pointer Update kernel variables Load new stack pointer Push registers onto stack Pop registers from stack OSPrioCur OSTCBCurPtr->StkPtr OSTCBCurPtr PSW R0 (SP) PSW PC PC R1 R1 R1 R2 R2 R2 R3 R3 R3 R4 R4 R4 R5 R5 R5 R6 R6 R6 PSW R7 R7 R7 PC R8 R8 R8 R9 R9 R9 R10 R10 R10 R11 R11 R11 R12 R12 R12 R13 R13 R13 R14 R14 R14 R15 R15 R15 Task A’s stack Task B’s stack
Task-Initiated Context Switches • Context switches can occur when tasks wait for events • Example: the reception of a packet • Waiting is accomplished with kernel functions