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Computer Organization

Computer Organization. 4. Stored Program Computers and Electronic Devices. Pattern. Jacquard Loom. Variable Program. Stored Program Device. Fixed Electronic Device. Assembly Language. ; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a

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Computer Organization

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  1. Operating Systems: A Modern Perspective, Chapter 4

  2. ComputerOrganization 4 Operating Systems: A Modern Perspective, Chapter 4

  3. Stored Program Computers and Electronic Devices Pattern Jacquard Loom Variable Program Stored Program Device Fixed Electronic Device Operating Systems: A Modern Perspective, Chapter 4

  4. Assembly Language ; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a ; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d Program Specification Source int a, b, c, d; . . . a = b + c; d = a - 100; Operating Systems: A Modern Perspective, Chapter 4

  5. Machine Language 10111001001100…1 10111001010000…0 10100111001100…0 10111010001100…1 10111001010000…0 10100110001100…0 10111001101100…1 Machine Language Assembly Language ; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a ; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d Operating Systems: A Modern Perspective, Chapter 4

  6. The von Neumann Architecture Central Processing Unit (CPU) Arithmetical Logical Unit (ALU) Control Unit (CU) Address Bus Data Bus Device Primary Memory Unit (Executable Memory) Operating Systems: A Modern Perspective, Chapter 4

  7. The ALU load R3,b load R4,c add R3,R4 store R3,a Right Operand Left Operand R1 R2 . . . Rn Functional Unit Status Registers Result To/from Primary Memory Operating Systems: A Modern Perspective, Chapter 4

  8. load R3,b load R4,c add R3,R4 store R3,a Fetch Unit 10111001001100…1 10111001010000…0 10100111001100…0 10111010001100…1 3054 PC Decode Unit IR load R4, c Execute Unit Control Unit Control Unit 3046 3050 3054 3058 Primary Memory Operating Systems: A Modern Perspective, Chapter 4

  9. Control Unit Operation • Fetch phase: Instruction retrieved from memory • Execute phase: ALU op, memory data reference, I/O, etc. PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; // fetch phase }; Operating Systems: A Modern Perspective, Chapter 4

  10. 1234 98765 read 1. Load MAR with address 2. Load Command with “read” 3. Data will then appear in the MDR Primary Memory Unit 0 MAR 1 2 MDR Command 1234 98765 Read Op: n-1 Operating Systems: A Modern Perspective, Chapter 4

  11. Device manager • Program to manage device controller • Supervisor mode software Abstract I/O Machine The Device-Controller-Software Relationship Application Program Software in the CPU Device Controller Device Operating Systems: A Modern Perspective, Chapter 4

  12. busy done 0 0 idle 0 1 finished 1 0 working 1 1 (undefined) Device Controller Interface . . . busy done Error code . . . Command Status Data 0 Data 1 Logic Data n-1 Operating Systems: A Modern Perspective, Chapter 4

  13. memory[1] contains the address of the interrupt handler Control Unit with Interrupt (Hardware) PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest) { memory[0] = PC; PC = memory[1] }; Operating Systems: A Modern Perspective, Chapter 4

  14. Interrupt Handler (Software) interruptHandler() { saveProcessorState(); for(i=0; i<NumberOfDevices; i++) if(device[i].done) goto deviceHandler(i); /* something wrong if we get to here … */ deviceHandler(int i) { finishOperation(); returnToScheduler(); } Operating Systems: A Modern Perspective, Chapter 4

  15. A Race Condition saveProcessorState() { for(i=0; i<NumberOfRegisters; i++) memory[K+i] = R[i]; for(i=0; i<NumberOfStatusRegisters; i++) memory[K+NumberOfRegisters+i] = StatusRegister[i]; } PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest && InterruptEnabled) { disableInterupts(); memory[0] = PC; PC = memory[1] }; Operating Systems: A Modern Perspective, Chapter 4

  16. Revisiting the trap Instruction (Hardware) executeTrap(argument) { setMode(supervisor); switch(argument) { case 1: PC = memory[1001]; // Trap handler 1 case 2: PC = memory[1002]; // Trap handler 2 . . . case n: PC = memory[1000+n];// Trap handler n }; • The trap instruction dispatches a trap handler routine atomically • Trap handler performs desired processing • “A trap is a software interrupt” Operating Systems: A Modern Perspective, Chapter 4

  17. Direct Memory Access Primary Memory Primary Memory CPU CPU Controller Controller Device Device Operating Systems: A Modern Perspective, Chapter 4

  18. Addressing Devices Primary Memory Primary Memory Memory Addresses Device 0 Device 0 Memory Addresses Device 1 Device 1 Device Addresses Device n-1 Device n-1 Operating Systems: A Modern Perspective, Chapter 4

  19. Polling I/O (Please refer to the Errata Sheet of the Textbook – A Better Version) … // Start the device … While((busy == 1) || (done == 1)) wait(); // Device I/O complete … done = 0; Software busy done … while((busy == 0) && (done == 1)) wait(); // Do the I/O operation busy = 1; … busy = 0; done = 1; Hardware Note: This part is added, compared to Fig. 4.11 of the textbook Operating Systems: A Modern Perspective, Chapter 4

  20. Fetch-Execute Cycle with an Interrupt while (haltFlag not set during execution) { IR = memory[PC]; PC = PC + 1; execute(IR); if (InterruptRequest) { /* Interrupt the current process */ /* Save the current PC in address 0 */ memory[0] = PC; /* Branch indirect through address 1 */ PC = memory[1]; } } Operating Systems: A Modern Perspective, Chapter 4

  21. Detecting an Interrupt CPU InterruptRequest flag Device Device Device Operating Systems: A Modern Perspective, Chapter 4

  22. The Interrupt Handler Interrupt_Handler{ saveProcessorState(); for (i=0; i<Number_of_devices; i++) if (device[i].done == 1) goto device_handler(i); /* Something wrong if we get here */ } Operating Systems: A Modern Perspective, Chapter 4

  23. Disabling Interrupts if(InterruptRequest && InterruptEnabled) { /* Interrupt current process */ disableInterrupts(); memory[0] = PC; PC = memory[1]; } Operating Systems: A Modern Perspective, Chapter 4

  24. Branch Table 1 2 3 The Trap Instruction Operation Mode S trap Trusted Code User Supervisor Operating Systems: A Modern Perspective, Chapter 4

  25. Intel System Initialization RAM Boot Prog ROM Loader Power Up Boot Device POST OS BIOS … CMOS Hardware Process Data Flow Operating Systems: A Modern Perspective, Chapter 4

  26. 0x0000100 BIOS loader Fetch Unit 0000100 PC Decode Unit IR … Execute Unit Bootstrapping Bootstrap loader (“boot sector”) 1 0x0001000 Primary Memory Operating Systems: A Modern Perspective, Chapter 4

  27. Fetch Unit 0001000 PC Decode Unit IR … Execute Unit Bootstrapping Bootstrap loader (“boot sector”) 1 0x0000100 2 BIOS loader 0x0001000 0x0008000 Loader Primary Memory Operating Systems: A Modern Perspective, Chapter 4

  28. Fetch Unit 0008000 PC Decode Unit IR … Execute Unit Bootstrapping Bootstrap loader (“boot sector”) 1 0x0000100 2 BIOS loader 0x0001000 0x0008000 Loader 3 0x000A000 OS Primary Memory Operating Systems: A Modern Perspective, Chapter 4

  29. Bootstrapping Bootstrap loader (“boot sector”) 1 0x0000100 2 BIOS loader 0x0001000 0x0008000 Fetch Unit Loader 3 000A000 PC 0x000A000 Decode Unit OS IR … Primary Memory Execute Unit 4. Initialize hardware 5. Create user environment 6. … Operating Systems: A Modern Perspective, Chapter 4

  30. A Pipelined Function Unit Operand 1 Function Unit Result Operand 2 (a) Monolithic Unit Operand 1 Result Operand 2 (b) Pipelined Unit Operating Systems: A Modern Perspective, Chapter 4

  31. A SIMD Machine ALU Control Unit (a) Conventional Architecture ALU Control Unit ALU ALU … ALU (b) SIMD Architecture Operating Systems: A Modern Perspective, Chapter 4

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