Design Rule Checking 2

1. Outline Corner-Based Pattern DRC Edge-Based Pattern DRC Edge-Based DRC Hierarchical DRC Goal Understand DRC algorithms Design Rule Checking 2

2. Corner patterns match at each rectangle corner check corresponding rule rule compiler to convert from boolean operations difficulty with multiple non-coincident edges 2 ~C ~C 2 P 2 P&C ~C 2 P P ~C 2 ~P P Corner-Based Pattern DRC Polysilicon Contact Enclosure Error

3. Edge rules - Magic design rule checker match at corner and edges apply at matching tile edge - corner-stitched rectangle database more natural than corners edge patterns match => check B along edge predicate P matches => check A at corner need rule compiler Edge-Based Pattern DRC 2 P 2 P A ~C B P Layer Type 1 Layer Type 2 P&C ~C 2

4. Scan chip sort edges that intersect scan line keep edges for max. design rule past scan line check rules against each edge rule: Met-Met spacing > 3 check: Met edges > 3 apart O(NlogN) time for N edges Issues have to track which is interior side of edge which edges belong to same polygon “top” and “bottom” edges of object object implicitly defined by edges can discard edges perpendicular to scan line coalesce colinear edges - avoid spurious errors Edge DRC

5. Designs are specified hierarchically to handle complexity Designs often have high regularity e.g. RAM, datapath typically 1-10% of a design is unique rest is replicated Only check unique geometry avoid rechecking replicated instances filter to unique geometry apply regular DRC algorithm Hierarchical DRC b c b • array - 9 unique symbol neighborhoods • a - 1 interior instance • b - 4 corner instances • c - 4 side instances c a c b c b

6. Benefits 10-100X faster less memory sensible error messages - no duplicates Symbol interaction design rule checks between symbol instances instances within maximum design rule distance overlapping instances Hierarchical DRC A B Check A Check B Check A+B interaction

7. Issues interaction analysis might cost more than flat DRC with error filtering interaction area might be most of chip area small symbols vs. interaction distance e.g. memory, datapath chip might have little regularity e.g. routing in standard cells most of chip is unique geometry automatically-generated flat symbols Hierarchical DRC

8. Check each symbol definition once symbol - collection of elements Check each unique element pair interaction once element - primitive element or symbol instance primitive element - geometry, indivisible objects pairwise check is suboptimal ideally check instance with all neighbors at once but pairwise might be faster Use symbol bounding boxes to speed comparison Write out primitive elements to be checked Hierarchical DRC Filter Algorithm

9. DRC Filter Algorithm • check_symbol(symbol) • if checked(symbol) { • note symbol bounding-box • } • else if leaf(symbol) { • write_out_all_geometry(symbol) • note symbol bounding-box • } • else { • for each element { • if symbol(element) { • if !checked(element) { • check_symbol(element) • } • note symbol bounding-box • } • else note symbol bounding-box • } • check_interactions_between_symbol_elements(symbol) • mark symbol checked • } • }

10. DRC Filter Algorithm check_interactions_between_symbol_elements(symbol) sort elements in x and y for each pair of elements (a, b) { if design_rule_exists(a, b) { if bloated_bounding_box_overlap(a, b) check_element_interactions(a, b) else design_rule_check(a, b) } } check_element_interactions(e1, e2) if (symbol(e1) or symbol(e2)) { e1 = element which is symbol e2 = other element for each e1 element e { if bloated_bounding_box_overlap(e, e2) check_element_interactions(e, e2) } } else design_rule_check(e1, e2)

11. DRC Filter Algorithm design_rule_check(geometry1, geometry2) if design_rule_exists(geometry1, geometry2) { write out geometry1 write out geometry2 } bloated_bounding_box_overlap(e1, e2) bb1 = grow(e1.bbox, MAX_DESIGN_RULE/2) bb2 = grow(e2.bbox, MAX_DESIGN_RULE/2) if intersect(bb1, bb2) return(TRUE) else return(FALSE) main() mark all symbols checked that are prechecked check_symbol(top-level-symbol)

12. Check A check C check g1-C.1 and g2-C.1 interactions DRC check g1-g2 Check B check g4-C.2 interaction Check interaction between A and B check C.1-g3 interaction check C.1-g4 interaction A.1 B.1 g1 C.1 C.2 g3 Top.1 g2 g4 Example