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Actel 54SX series MEC Testing, UMC Reliability Assessment . Briefing: Independent NASA Test of RTSX-SU FPGAs. 16 February 2005. Dennis Dowden EPD/PSC 310-814-1268. NGST/Actel Programming Environment Testing. 200 54SX72A-PQ208 MEC devices were programmed: 100 at NGST
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Actel 54SX seriesMEC Testing, UMC ReliabilityAssessment Briefing: Independent NASA Test of RTSX-SU FPGAs 16 February 2005 Dennis Dowden EPD/PSC 310-814-1268
NGST/Actel Programming Environment Testing • 200 54SX72A-PQ208 MEC devices were programmed: • 100 at NGST • 100 at Actel utilizing power line conditioning units supplied by NGST • Programmed with OPA SSU for comparison to Boeing P7 testing. • Results and comparison to P7:
NGST/Actel Programming Environment Testing • Assessment: • Programming Yield is higher with power line conditioning: • This test and subsequent programming of Actel UMC devices for NASA testing has shown yields >95% with line conditioning. • During all Industry Tiger Team Testing programming fallout has been ~10% or more, OPA or NPA. Programming of UMC devices has had industry reported instances of fallout > 10%. • Zero Hour failure(s): • Boeing programming had 5/497 zero hour failures with 32K module part. • NGST/Actel test had 1/193 zero hour failures with 72K module part. • 72K has ~2.3x the fuses as the 32K. • Power line conditioning reduced zero hour failures by a factor of 4.5 (normalized). • Overall failure rate: • Boeing P7 test had 35/497 ~ 7.0% failure rate. • Actel/NGST test had 17/(193 x 2.3) ~ 3.8% failure rate. • This failure rate does not take into account that 72A devices do not have I/O module resistors which increases stress at least 100x (for a portion of antifuses). • 72As do not have space level screening. • Power line conditioning reduces overall failure rate (thumbnail = 10x).
NGST MEC FPGA Experience • NGST has had no in-situ failures of FPGA’s (OPA or NPA): • NGST programming yield has been high (>97%). • NGST has thousands of hours in-situ on multiple designs. • Industry:Some users have reported failures, but variation in methodologies has made it unclear as to the exact cause. Highest commonalities: high frequency coupled with overshoot/undershoot. • Suspected contributing factors: • Design Practices. • Application (out-of-spec and high frequency). • Programming Environment (insufficient power conditioning/control, ESD). • Insufficient characterization, validation, and understanding of factors causing variation of the programming algorithm and workstation. • ESD/EOS: Insufficient ESD controls; imposing of additional screens post programming (ATE, B/I). • Actel position that the Industry Test Element Circuit (SSU) is not representative of user design/application (QBI circuit envelopes user designs).
NASA testing of UMC Foundry devices. • The Question: What needs to be done to retire risk for space application: • (Open and review spreadsheet) • Spreadsheet assumes constant failure rate. • Spreadsheet bounds Ea from 0.2 – 1.6.
NASA testing of UMC Foundry devices. • The Question: What needs to be done to retire risk for space application: • (Open and review spreadsheet) • Spreadsheet assumes constant failure rate. • Spreadsheet bounds Ea from 0.2 – 1.6. • For an Ea of 0.4 and an AF of 25 for undershoot a useable FIT rate has been achieved.
NASA testing of UMC Foundry devices. • The Question: What needs to be done to retire risk for space application: • (Open and review spreadsheet) • Spreadsheet assumes constant failure rate. • Spreadsheet bounds Ea from 0.2 – 1.6. • For an Ea of 0.4 and an AF of 25 for undershoot a useable FIT rate has been achieved. • Other Options (mitigate risk of above assumptions) • Continue NASA testing for another 2000 –3000 hours. • Minimal risk, least cost, quickest results. • Perform Three temperature reliability testing (e.g. 175, 200, 225 C). • This testing may or may not deliver the desired result as root cause(s)/wearout mechanism(s) are not clearly defined. • High temperature testing may induce failures that cannot be differentiated from “wearout” failures.