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Investigation of BANSMOM System. m 5151117 Yumiko Kimezawa. Outline. Previous Work Current Work Investigation of BANSMOM System Requirement Investigation of Stratix III Board Future Work. Previous Work. Implementation of 5-lead system Implementation of 10-lead system.
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RPS Investigation of BANSMOM System m5151117 Yumiko Kimezawa
Outline RPS • Previous Work • Current Work • Investigation of BANSMOM System • Requirement • Investigation of Stratix III Board • Future Work
Previous Work RPS • Implementation of 5-lead system • Implementation of 10-lead system • Logic utilization: 62% Not compiled
Investigation of BANSMOM System RPS • CPU memory • Until now • Instructions and data are in the same space • Minor change • Instructions and data are in different spaces Instruction cache: Write back is not required Data cache: Write back is required Inefficient Use of cache becomes efficient through separating these memories
Investigation of BANSMOM System RPS • Memory size (in 1-lead system’s case) • Master CPU instruction memory: 64Kbyte • Master CPU data memory: 32KByte • PPD CPU instruction memory: 32KByte • PPD CPU data memory: 32KByte • Shared memory: 2Kbyte • Program size • Master module: 55 Kbyte (code + initialized data) • PPD module: 16 Kbyte (code + initialized data) • Now, on-chip memory is used in the system • CPU instruction and data memory make up a most portion of memory of the system
Requirement RPS • BANSMOM system needs a lot of cache memory Use of off-chip memory as not only shared memory but also cache memory will be required
Investigation of Stratix III Board RPS Off-chip memory • DRAM • DDR3 SDRAM • DDR2 SDRAM • DDR SDRAM • QDRII + SRAM • QDRII SRAM • PLDRAM II • SRAM • QDR I/QDR II • NBT/Nobl • I’m trying to investigate • Memory capacity • How to use off-chip memory • Which memory to use
Future Work RPS • Optimization of BANSMOM system • investigate • Finish adding off-chip memory to our system
Investigation of Stratix III Board RPS • Embedded memory • M9K memory block: 355 • M144K memory block: 16 • Embedded memory: 5,499 Kbit • MLAB: 1,775 Kbit
Program Size RPS • 1-lead system • Master module • 55 Kbyte (code + initialized data) • PPD module • 16 Kbyte (code + initialized data) • 2-lead system • Master module • 56 Kbyte (code + initialized data) • PPD module • 16 Kbyte (code + initialized data) • PPD module 2 • 16 Kbyte (code + initialized data)
How to Optimize Software(example) RPS • MicroC/OS-II