Silicon pad sensors for WSiCal

1. Silicon pad sensors for WSiCal Václav Vrba Institute of Physics AS CR, Prague Václav Vrba, Institute of Physics, AS CR

2. Outline • Si wafer basic layout GDS file • Pre-prototyping Václav Vrba, Institute of Physics, AS CR

3. Si wafer layout 0.5 mm Václav Vrba, Institute of Physics, AS CR

4. To be done: • Define contacts to diodes; • Define test structures – number of them are ready in sketches, but should be discussed; • Technical finalization of design (corner rounding, discus design rules with vendors, etc.) • Etc. Václav Vrba, Institute of Physics, AS CR

5. Pre-prototyping Active area cca 0.3 cm2 Active area cca 10 cm2 Wafer diameter: 100 mm Thickness: 250 um Wafer backside all Al metallized Václav Vrba, Institute of Physics, AS CR

6. Electric characterization Václav Vrba, Institute of Physics, AS CR

7. Electric characterization (cont) Václav Vrba, Institute of Physics, AS CR

8. Conclusions • The design of the silicon pad array is on the way; some adjustments and more detailed discussions are needed; • The design could be ready for submission in approximately one month; the sensors delivery should be discussed with vendors; • “Pre-prototype” probes give encouraging results: • - leakage current is well below 20 nA/cm2 • - for 500 um thick wafers one can expect Vdepl around 280V, and the operational voltage Vop can be around 320 V; this is well below the measured break down voltages; • “Pre-prototype” probes already meet technical specifications. Václav Vrba, Institute of Physics, AS CR