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Tunneling Devices

EE666 – Advanced Semiconductor Devices. Tunneling Devices. Dane Wheeler April 19, 2005. EE666 – Advanced Semiconductor Devices. Tunneling Devices. Dane Wheeler April 19, 2005. Outline. Motivation Band-to-Band Tunneling Device Proposals Fabrication Techniques Notre Dame Devices

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Tunneling Devices

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  1. EE666 – Advanced Semiconductor Devices Tunneling Devices Dane Wheeler April 19, 2005

  2. EE666 – Advanced Semiconductor Devices Tunneling Devices Dane Wheeler April 19, 2005

  3. Outline • Motivation • Band-to-Band Tunneling • Device Proposals • Fabrication Techniques • Notre Dame Devices • Conclusions

  4. Motivation • Scaling: some proposed tunneling field effect transistor (TFET) designs do not suffer from short channel effects • Power Dissipation: TFETs can beat the 60 mV/decade sub-threshold swing of MOSFETs • Design Flexibility: Circuits can be made with fewer devices

  5. human brain in 2012? Obligatory Moore’s Law Reference http://www.intel.com/research/silicon/mooreslaw.htm

  6. What’s so great about a tunneling device? • Lower sub-threshold swing can allow for lower operating voltages to be used • Negative differential resistance (NDR) properties can be exploited to create simpler designs for bi-stable circuits, differential comparators, oscillators, etc. • Leads to chips that consume less power

  7. Tunneling • Tunneling is a quantum mechanical phenomenon with no analog in classical physics • Occurs when an electron passes through a potential barrier without having enough energy to do so

  8. (Esaki) Tunnel Diode (TD) EC EV EF • Simplest tunneling device • Heavily-doped pn junction • Leads to overlap of conduction and valence bands • Carriers are able to tunnel inter-band • Tunneling goes exponentially with tunneling distance • Requires junction to be abrupt

  9. Band-to-Band Tunneling in a Tunnel Diode (c) (e) I (b) (d) V EC (a) EV EF (a) (b) (c) (d) (e)

  10. I V Figures of Merit Peak current 100 kA/cm2 Peak-to-Valley Ratio (PVR)

  11. Bi-stable Configuration V I D1 X D2 X1 X2 V

  12. TD Differential Comparator VCC D3 D4 CK X M3 M4 D1 D2 VOUT VOUT VIN VIN RL RL M1 M2 I1 I2 ITAIL -VEE

  13. Direct vs. Indirect Tunneling Indirect Direct Indirect materials require phonons to tunnel, thus reducing the probability of a tunneling event

  14. Tunnel Current Expressions

  15. G tox ox tSi y S p+ Si n+ Si D x L W BOX Lateral TFET • Proposed by our own Qin Zhang • Can theoretically beat 60 mV/decade sub-threshold swing

  16. Lateral TFET On State Off State

  17. Another Lateral TFET • Proposed by A. Zaslavsky in SOI, although original idea from Shockley • Gate placed on top of depletion region

  18. More about AZ TFET

  19. Double Lateral TFET • Acts as back-to-back TD pair at 0 gate bias • Gate bias of either polarity will break tunneling condition

  20. Fabrication Techniques • As mentioned earlier, heavily-doped, abrupt junctions are needed • Can be obtained using several different methods • Ion implantation • Rapid thermal diffusion • Molecular beam epitaxy • Laser diffusion

  21. Doping by Rapid Thermal Processor Approach: Rapid thermal diffusion Spin-on diffusants 100 mm wafers IC-compatible processes Modular Process Technology RTP-600S

  22. Proximity Rapid Thermal Diffusion

  23. Rapid Thermal Diffusion Transient-enhanced diffusion effects dominate, increasing diffusivity of dopants

  24. Ion Implantation

  25. Simulated Built-in Field

  26. Simulated Band Diagram

  27. First TDs from Rapid Thermal Diffusion

  28. TDs with Oxide Window Process First demonstration of tunnel diodes on high resistivity 1 – 5 kW cm substrates Enables microwave characterization

  29. Conclusions • Tunnel diodes are expected to add another node in the road • Three-terminal tunnel devices could add several nodes at the end of CMOS-scaling • Challenges facing TFETs are more practical than theoretical • Lithography, SOI process optimization

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