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Circuit Types and Analysis

Circuit Types and Analysis. DFM = Design for Manufacturing. Passive Components, RLC. Critical Factors: Ambient Temperature Thermal Deratings & Variation of Primary Parameter (Temp Co) Maximum Imposed Voltage and/or Current Maximum Imposed dV/dT and/or Frequency

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Circuit Types and Analysis

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  1. Circuit Types and Analysis • DFM = Design for Manufacturing

  2. Passive Components, RLC • Critical Factors: • Ambient Temperature • Thermal Deratings & Variation of Primary Parameter (Temp Co) • Maximum Imposed Voltage and/or Current • Maximum Imposed dV/dT and/or Frequency • Inductive Frequency (high frequency model) • Minimum Analysis & Selection Considerations: • Primary Parameter Tolerances (R, L, C %) • Total Power vs Package Dissipation • Maximum Voltage • Composition, Specific die-electrics, construction, etc

  3. Passive Discretes • Resistors/Inductors: Must specify or account for Tolerance, Power, Package and Temp Coefficient • Derating Guide: ~50% of rated power or current • Std Tolerances: 0.1%, 1%, 5%, 10% and 20% • Constructional Anomalies: Max Voltage, Inductive with High Freq • Capacitors: Must specify or account for Tolerance, WV, Polarization, Dielectric, Temp Co and Package • Derating Guide: ~50% of rated voltage • Std Tolerances: 1%, 2%, 5%, 10%, 20%, 80% • Constructional Anomalies: Charge Leakage, Inductive with High Freq,

  4. Passive Component Specifications

  5. Small Signal Amplifiers • Critical Factors: • Component Tolerances, particularly gain setting R’s • OpAmp Input Offset Voltage (Vio), worse for high gain • Input Bias Current (Ib), Input Offset Current (Iio) • Finite Diff Gain (Ad) & Variation of Ad with Frequency • Output Slew Rate and Output Vp-p at Maximum Frequency • Worst Case Analysis: • Total DC Offset error in Volts (1,2,3) • Total Gain Error vs Nominal, Converted to Volts (1,4) • Power Bandwidth for Application (1,5)

  6. Basic Gain in Voltage, Current or CombinationLinear Operation: No New Frequencies Created • Voltage Amplifiers (Vin >> Vout): Av = Vout/Vin • Current Amplifiers (Iin >> Iout): Ai = Iout/Iin • Transimpedance (Iin >> Vout): Zm = Vout/Iin • Transconductance (Vin >> Iout): Gm = Iout/Vin Additional Parameters • Input Impedance: Zin = Vin/Iin • Output Impedance: Zout = {Vout(NL) – Vout(L)}/Iout • Slew Rate (SR): Min dVout/dT • Slew Rate BW = SR/2pVp where Vp = Peak Voltage

  7. + - Operational AmplifierLinear, Differential, High Gain Amplifier Advantages Over Single Ended Amplifier Block ?? • Easy to add positive and negative feedback with differential input • Single Ended Application Gains can be tightly controlled with external components and made insensitive to internal transistor gain variations • Inherent noise rejection when noise enters both input terminals

  8. Basic Op-Amp SimplifiedImplementation

  9. + - Operational AmplifierIdeal Assumptions Vp Used for basic analysis, nominal gain analysis Vout • Vout = Ad (Vp – Vn) where Ad is the diff gain • Ad = Infinite • Zin = Infinite, Iin = 0 where Iin is the input current • Vp = Vn because of infinite Ad, Vo may be non-zero under this condition • Iout = Infinite (Often a false assumption) These basic assumptions allow simple circuit analysis to determine Nominal gain applications Vn

  10. + - Operational AmplifierPower Supplies Vcc Vp Power Supplies can be a critical consideration Vout • -Vcc < Vout < Vcc At all times, Vout(max) may be as low as 2 to 5 volts below Vcc depending upon model • Vcc, -Vcc sometimes referred to as “Rails” due to power distribution on some boards resembling tracks • Many applications use “Split” supply Operation • Split Supply means Vcc = |-Vcc| • Some models characterized for 1 supply operation (but ALL will work there) • Single Supply means –Vcc = 0 • Vcc, -Vcc power pins should always be capacitively filtered with 0.1uf (usually ceramic monolithic X7R or similar) Vn -Vcc

  11. Operational AmplifierClassifications

  12. + - Operational AmplifierBasic Applications Rf Av = - Rf/Ri Zin = Ri Inverting Voltage Amp Ri Vin Vout Rp

  13. + - Operational AmplifierBasic Applications Ri Av = 1 + Rf/Rp Zin = Ri + Non-Inverting Voltage Amp When Rf=0, Rp=~Infinite…… Av = 1 Vin Vout Rf Rp 8

  14. + - Operational AmplifierBasic Applications Av = 1 Zin = Unity Gain Voltage Amp Vin Vout 8

  15. + - Operational AmplifierBasic Applications Ri Gm = 1/Rp Zin = Ri + Transconductance Amp Vin RL Iout Rp 8

  16. + - Operational AmplifierBasic Applications Rf Zm = - Rf Transimpedance Amp Iin Vout RL

  17. + - Operational AmplifierBasic Applications Ai = -(1 + Ri/Rp) Current Amplifier Iin RL Ri Iout Rp

  18. + - Operational AmplifierReal Characteristics Ip Vp Vout Used for more accurate Gain Characterization Iout Vio • Vout = Ad(Vp – Vn) + Ac(Vp + Vn)/2 + Vio Ad is the diff gain, Ac is the common mode gain, Vio = offset • CMRR = Common Mode Rejection Ratio = 20log(Ad/Ac) • Ib = Bias Current (Ave Current = [Ip + In]/2) • Iio = Offset Current (Diff Current = Ip – In) • Iout = Finite, Split between gain set components and load • Vio = Input Diff Voltage reflected back from Vo under the condition the Vp = Vn = 0 Use superposition to understand contributions In Vn

  19. + - Operational AmplifierReal Characteristic Effects Basic Strategy Vp • Consider the Effect Separately, then combine results • Show Ib and Iio as input current sources • Show Vio as diff voltage on Vp-Vn • Use amended opamp in std application circuit, Vin=0 (grounded). • Find Vout, all Vout will be Verror due to Offset and Bias Vout Vn

  20. + - Inverting ConfigurationOffset Error Contribution 1 Rf Ii = (0-Vio)/Ri If = (Vio-Vo)/Rf Ii = If Vo = Vio(1 + Rf/Ri) = Verr Inverting Voltage Amp Error Voltage due to Vio Ri If Vout Vio Ii Rp

  21. + - Non-inverting ConfigurationOffset Error Contribution 1 Ri Ii = (0-Vio)/Rp If = (Vio-Vo)/Rf Ii = If Vo = Vio(1 + Rf/Rp) = Verr Non-Inverting Voltage Amp Error Voltage due to Vio Vin Vout Vio Rf If Rp Ii

  22. Op-Amp Technologies (EDN)Offset Voltage Comparisons IO

  23. Op-Amp Technologies (EDN)Input Bias Current 10 deg C

  24. + - Operational AmplifierOffset Error Contribution 2 Rf At V+: Iio = Ib + V+/Rp V+ = Rp(Iio-Ib) At V-: -V-/Ri = (V—Vout)Rf + Ib + Iio Sub V+ into above equation Vo = Verr = Rf(Ib+/-Iio)+/-[(RfRp/Ri +Rp)(Iio-/+Ib)] Note if Iio = ~0 and Rp = Rf//Ri, then Verr = 0 Verr is minimized when Rp = Rf//Ri Inverting Voltage Amp Error Voltage due to Ib, Iio Ri If Vout Iio Ii Ib Ib Rp

  25. + - Inverting AmplifierGain Error Rf Av (nom) = - Rf/Ri But Assume Vout = Ad(V+ - V-) Find expressions for V+ & V- Substitute into above Vout Solve for Vout/Vin = Av Av = -(RfAd)/(RiAd + Ri + Rf) Av = Av(nom)/CF CF = Correction Factor CF = 1 + 1/Ad + Rf/(RiAd) |Av| < |Av (nom)| Inverting Voltage Amp Ri If Vin Vout Ii Rp Don’t Forget to Factor in RTol% !

  26. + - Non-Inverting AmplifierGain Error Ri Vin Vout Av (nom) = 1+ Rf/Rp But Assume Vout = Ad(V+ - V-) Find expressions for V+ & V- Substitute into above Vout Solve for Vout/Vin = Av Av = Ad(Rp + Rf)/(RpAd + Rp + Rf) Av = Av(nom)/CF CF = Correction Factor CF = 1 + 1/Ad + Rf/(RpAd) |Av| < |Av (nom)| Non-Inverting Voltage Amp Rf Rp Don’t Forget to Factor in RTol% !

  27. + - Operational AmplifierGain Error Rf Ri If Vin Vout Ii Largest Error will be due to Rtol !!Gain Error = Av(nom) – Av Verr from Gain Error Verr = Vin(max) * Gain Error Rp

  28. Total Error • Verr due to Offset and Bias Effects • Plus Verr due to Gain Error • Requirements may dictate an outright nominal gain plus a total error voltage or current budget

  29. + - Operational AmplifierGain vs Bandwidth Tradeoff Rf Av = - Rf/Ri = Nominal Closed Loop Gain Ad (Op-amp) = Open Loop Gain • Ad rolls off with frequency, 20db/dec, after first pole (~ 1 to 100 Hz) • Bandwidth of Closed Loop Gain, Fcl, limited by Ad(f) • Av <= Ad (fcl) • Ad(0) = Typically 60dB to 140 dB or higher • When Ad(f) = 1, f = Unity Gain Freq • Above fcl, Av will fall at 20db/dec (8db/oct) Ri Vin Vout Rp

  30. Common Sensor Interface Requirements (EDN)

  31. Filters • Critical Factors: • Passive Component Tolerances • OpAmp Input Offset Voltage (Vio), worse for high gain • Input Bias Current (Ib), Input Offset Current (Iio) • Loading effects of input source, output loads • Output Slew Rate and Output Vp-p at Maximum Frequency • Worst Case Analysis: • Transfer Function Analysis • Total DC Offset error in Volts (1,2,3) • Mag (dB) & Phase (deg) vs Frequency Plots (1,4) • Power Bandwidth for Application (1,5) • Pulse Response (topology, 4)

  32. Filter Basics • Linear Operation Must Be Maintained: • Gain is Frequency Dependent but …. • No New Frequencies are Created

  33. Basic Low Pass Filter Potential Filter Shapes

  34. Basic High Pass Filter Potential Filter Shapes

  35. Basic BandPass Filter Potential Filter Shapes

  36. Basic BandStop Filter Potential Filter Shapes

  37. Filter Basics General 2nd Order Transfer Function where; • Filter Passband Shaping: • Q = Quality (Shape) Factor For Filter • Q is related to the damping factor Q = 1/2a • Put Xfer Function into form with D(s) above • Find expression for Wo, then find Q or a

  38. Effect of Shape Factor on Filters Lowpass Highpass Bandpass Bandstop

  39. Filter Scaling • Filter Scaling: • All filter coefficients and polynomials are normalized to Wo = 1 rad/sec • To rescale, replace S with S/Wo(new) • Given an RC implementation circuit, Wo may also be moved by rescaling the Capacitors

  40. Basic 2nd Order Implementations - Hambley Lowpass Highpass Bandpass

  41. + - + - Multi-Function Filter Design Summing Inv Amp Vout BP Vin -1 R1 C1 R2 C2 -1 + A1 -1 Vout HP A2 Vout LP Rp Rp Inv Amp -B See: http://www-k.ext.ti.com/SRVS/Data/ti/KnowledgeBases/analog/document/faqs/spexpert.htm

  42. Filter Simulation of Component Tolerances • Worst Case Analysis: • Transfer Function Analysis • Total DC Offset error in Volts • Mag (dB) & Phase (deg) vs Frequency Plots • Power Bandwidth for Application • Pulse Response

  43. Comparators • Critical Factors: • Passive Component Tolerances, Diode Clamp Tolerances • Input Offset Voltage (Vio) • Input Bias Current (Ib), Input Offset Current (Iio) • Voh, Vol clamping voltages • Output Slew Rate and Delay • Vref Tolerance • Worst Case Analysis: • Vutp and Vltp (upper and lower trip points, 1,2,3,4,6) • Total hysteresis voltage (1-4,6) • Max switching frequency (5)

  44. Oscillators • Critical Factors: • Passive Component Tolerances • Loading effects of output loads • Output Slew Rate and Output Vp-p at Frequency of Oscillation • Worst Case Analysis: • Transfer Function Analysis of any Linear Feedback Circuit • Forward path gain Analysis at 0 or 180 deg phase response • Mag (dB) & Phase (deg) Margins vs Frequency Plots (1,2) • Variation of Fo (1,2) • Power Bandwidth (3)

  45. Wein Bridge Oscillator Loop Gain

  46. Voltage Regulators, Power Supplies • Critical Factors: • Passive Component Tolerances (voltage set resistors) • Loading effects • Input voltage DC, AC and noise levels • Filtration Capacitors • Ambient Temperature • Worst Case Analysis: • DC Output voltage variation (1,2,3) • AC Output ripple, noise (2,3,4) • Critical device power dissipation, Junction Temp (2,3,5) • Startup Output voltage vs Input voltage vs Time (2,3,4) • Safety Considerations

  47. Analog Circuit DFM Analysis

  48. Wien-Bridge Oscillator Example Joe Student

  49. Wien-Bridge Theory of Operation • Uses phase shift RC networks connected to a forward path NI Amp • Amplifier-Feedback • Loop Gain = 1 • Loop Phase = 0o

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