Chapter 9 Bipolar Logic Circuits

1. Chapter 9Bipolar Logic Circuits Microelectronic Circuit Design Richard C. JaegerTravis N. Blalock Microelectronic Circuit Design McGraw-Hill

2. Chapter Goals • Bipolar switch circuits • Emitter-coupled logic (ECL) • Behavior of the bipolar transistor as a saturated switch • Transistor-transistor logic (TTL) • Schottky clamping techniques for preventing saturation • Operation of the transistor in the inverse-active region • Voltage reference design • BiCMOS logic circuits Microelectronic Circuit Design McGraw-Hill

3. The Current Switch (Emitter-Coupled Pair) • The building block of emitter-coupled logic (ECL) is the current switch circuit which consists of matched components Microelectronic Circuit Design McGraw-Hill

4. The Current Switch • Depending on how much higher or lower the input voltage vI is compared to VREF, the reference current will switch to one of the legs creating a voltage vC1or vC2 Microelectronic Circuit Design McGraw-Hill

5. Mathematical Model for Static Behavior of the Current Switch • The previous figure showed the ideal case for switching the currents between the two legs, but in real BJTs current will be present in both legs depending upon vBE of each BJT in the pair • The collector current difference is given by: Microelectronic Circuit Design McGraw-Hill

6. Current Switch Analysis for vI > VREF • Given the circuit shown under the given bias conditions (vI is 300mV larger than VREF), the majority of current will flow in the left leg Microelectronic Circuit Design McGraw-Hill

7. Current Switch Analysis for vI < VREF • Given the circuit shown under the given bias conditions (vI is 300mV less than VREF), the majority of current will flow in the right leg Microelectronic Circuit Design McGraw-Hill

8. The Emitter-Coupled Logic (ECL) Gate • The outputs of the previous current switch have the value of either 0V or –0.6V • The difference of the input and output of the current switch is exactly one base-emitter voltage drop • For a complete ECL gate, the voltages are shifted by a base-emitter drop as shown in the figure Microelectronic Circuit Design McGraw-Hill

9. ECL Gate Summary For vI = -0.7V For vI = -1.3V Microelectronic Circuit Design McGraw-Hill

10. ECL Gate Benefits • ECL gates produce both true and complemented outputs • ECL gates are fast since it the BJTs are always in forward active mode, and it only takes a few tenths of a volt to get the output to change states, hence reducing the dynamic power • ECL gates provide near constant power supply current for all states thereby generating less noise from the other circuits connected to the supply Microelectronic Circuit Design McGraw-Hill

11. Noise Margins for the ECL Gate Microelectronic Circuit Design McGraw-Hill

12. Current Source Implementation • Instead of using actual current sources for the current biasing in an ECL gate, resistors can be used as shown below Note that the currents in the emitter-follower legs will not be equal since the output voltages will be different. This will instead be looked at as an average value between the two legs. Microelectronic Circuit Design McGraw-Hill

13. ECL Gate Design Example • Design an ECL gate with the circuit configuration shown on the previous slide to operate at a power supply of –3.3V knowing the following information And a mean emitter follower current of 0.1mA Microelectronic Circuit Design McGraw-Hill

14. ECL Gate Design Example • For vI = –1.3V, Q1 will be off causing the common emitter voltage to be –1.7V. REE can now be calculated by the following: • And RC2 is: Microelectronic Circuit Design McGraw-Hill

15. ECL Gate Design Example • For vI = –0.7V, Q2 will be off causing the common emitter voltage to be –1.4V. IE1 can now be calculated by the following: • Now RC1 can be found as: Microelectronic Circuit Design McGraw-Hill

16. ECL Gate Design Example • Finally, R can be calculated by using the mean output voltage and current levels Microelectronic Circuit Design McGraw-Hill

17. The ECL OR-NOR Gate Three variations of a 3-input ECL OR-NOR Gate Microelectronic Circuit Design McGraw-Hill

18. The Emitter Follower • The main purpose of the emitter follower in ECL gates is to create a level shift in the output • The figure shows both the circuit and its transport model for the forward- active region Microelectronic Circuit Design McGraw-Hill

19. The Emitter Follower • The emitter follower is called such since the voltage at the emitter follows the votlage at the base, but at an offset which can be seen in the ideal VTC Microelectronic Circuit Design McGraw-Hill

20. The Emitter Follower with a Resistor Bias • As previously shown, the current source can be replaced with a resistor bias scheme • This technique will cause a change in vBE due to the variation of iE as vO changes, but this change is minimal and vO = vI – 0.7 Microelectronic Circuit Design McGraw-Hill

21. The Emitter Follower with a Resistor Load • The addition of a resistive load will alter the minimum voltage of an ECL gate (when iE=0) Microelectronic Circuit Design McGraw-Hill

22. “Emitter Dotting” or “Wired-OR” Logic • The circuit shown in the figure exhibits two emitter followers in parallel with a common output • The result for the shown bias condition implies that Q2 is cutoff and Q1 has to handle 2IEE Microelectronic Circuit Design McGraw-Hill

23. Wired-OR Logic Function • The parallel emitter on the previous slide can be used to implement an OR function as shown in the figure, also called the Wired-OR • This is distinct to ECL logic since in most logic families, the outputs cannot be tied together Microelectronic Circuit Design McGraw-Hill

24. Design of Reference Voltage Circuits • So far the implementation of the VREF signal has not been discussed, but it can be created with a simple resistor voltage divider as seen below • The Thévenin equivalent circuit is used to show that the voltage at the base of Q2 will not be exactly 1V as designed due to the fact that there will be a resistive voltage drop across the Thévenin resistance induced by iB2 Microelectronic Circuit Design McGraw-Hill

25. Temperature Compensation • Since the vBE of the BJT changes by approximately –1.8mV/K, it is obvious that when REE is used to replace the current switch current source, that iE2will vary with temperature • Two techniques are shown below that temperature compensate (track) the variation Microelectronic Circuit Design McGraw-Hill

26. Diodes in Bipolar Integrated Circuits • In ICs it is desired to have a diode match the base-emitter characteristics of a BJT (temperature compensation circuit) • Since a normal diode structure takes about the same amount of Silicon area as a BJT, it is just as easy to tie base to the collector (diode-connected) of a BJT to create a diode Microelectronic Circuit Design McGraw-Hill

27. ECL Power Dissipation • The static average power of an ECL inverter can be found by the following (referring to the shown circuit): Microelectronic Circuit Design McGraw-Hill

28. Power Reduction • Approximately 40% of the power is dissipated by the emitter-follower stages • One technique to reduce this current is to make the bias the emitter-follower resistors at a less negative value thereby reducing the current, however this requires an additional power supply • Another technique is to share the current in the manner shown on the next slide (similar to the wired-OR), however any output that is not driving another logic gate needs to be terminated with a resistor to the negative power rail Microelectronic Circuit Design McGraw-Hill

29. Power Reduction Changing the power supply Repartitioned ECL gate Microelectronic Circuit Design McGraw-Hill

30. Gate Delay ECL inverter with all capacitors shown Simplified ECL gate model for dynamic response Microelectronic Circuit Design McGraw-Hill

31. Gate Delay • The gate delays and voltages can be calculated with following expressions: Microelectronic Circuit Design McGraw-Hill

32. Power-Delay Product • The below figures illustrate the tradeoff of power and speed for ECL gates Microelectronic Circuit Design McGraw-Hill

33. The Saturating Bipolar Inverter • One of the most basic circuits for BJT logic gates is the saturating bipolar inverter • The resistor pull the output high when vI is low, and the output goes to vCE when vI is high Microelectronic Circuit Design McGraw-Hill

34. Saturating Bipolar Inverter Example • Design a saturating bipolar inverter such that the collector saturation voltage is 0.1V with a collector of 10A. Find the base current required to achieve these specs given the following: Microelectronic Circuit Design McGraw-Hill

35. Saturating Bipolar Inverter Example • First find the minimum VCE: • Next find Г: Microelectronic Circuit Design McGraw-Hill

36. Saturating Bipolar Inverter Example • Finally, solving for IB: Microelectronic Circuit Design McGraw-Hill

37. Load Line Visualization • The following is a typical load line characteristic for a saturating bipolar inverter Microelectronic Circuit Design McGraw-Hill

38. Switching Characteristics of the Saturated BJT • An important switching factor is that when excess base current required to drive the BJT into saturation is stored into the base region. This charge needs to be removed before the BJT can be turned off. • This delay is called the storage time (tS) • The figures show typical switching characteristics Microelectronic Circuit Design McGraw-Hill

39. Switching Characteristics of the Saturated BJT • The storage time delays can be calculated using the following expressions: • Where αF and αR are the forward and reverse common-base current gains, and τF and τR are the forward and reverse transit times Microelectronic Circuit Design McGraw-Hill

40. A Transistor-Transistor Logic (TTL) Prototype • TTL has the workhorse for digital systems such as microprocessors for years • The basic structure for the TTL inverter is shown below Microelectronic Circuit Design McGraw-Hill

41. TTL Inverter Operation • The two figures show the bias points for the two standard low and high inputs • The output ranges from VOL = 0.15V to VOH = 5V Microelectronic Circuit Design McGraw-Hill

42. Power in the Prototype TTL Gate • The power the TTL inverter dissipates for a low output is: • The power the TTL inverter dissipates for a low output is: Microelectronic Circuit Design McGraw-Hill

43. VIH, VIL, and Noise Margins for the TTL Prototype • The figure shows where VIL and VIH occur, and they can be approximated by the following expressions using standard TTL values: Microelectronic Circuit Design McGraw-Hill

44. Fanout Limitations of the TTL Prototype • For NMOS, CMOS, and ECL gates, fanout was not investigated in detail since the input current to these gates were considered to be zero. However, this is not the case for TTL as seen in the figure. Microelectronic Circuit Design McGraw-Hill

45. Fanout Limitations of the TTL Prototype Example • For a TTL gate find: a) the fanout limit (N) for a VCESAT2 less that 0.1V b) the input current iIH and fanout limit for vI = vOH assuming βR1 = 2 Given the following: Microelectronic Circuit Design McGraw-Hill

46. Fanout Limitations of the TTL Prototype Example • First find N for vO = VL: • Next find the max iC: Microelectronic Circuit Design McGraw-Hill

47. Fanout Limitations of the TTL Prototype Example • Continuing: • The collector current can be no greater than • Which give the following: Microelectronic Circuit Design McGraw-Hill

48. Fanout Limitations of the TTL Prototype Example • But computing for vO = VH, it can be found the the fanout (N) is 7. Therefore, the max fanout for the circuit is 7 • Part b) analysis - Finding iIH and N with βR1 = 2 Microelectronic Circuit Design McGraw-Hill

49. The Standard 7400 Series TTL Inverter • One problem of the TTL inverter prototype described so far is that the dynamic response is asymmetrical due to the use of a resistive load to pull the output up and a BJT to pull the output down • Another problem is that the fanout capability is highly sensitive to βR Microelectronic Circuit Design McGraw-Hill

50. The Standard 7400 Series TTL Inverter • The classic approach to fixing these problems is the implementation of the 7404 hex inverters in a dual-in-line package (DIP) Microelectronic Circuit Design McGraw-Hill