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d2. d1. d0. d3. e2. e1. e0. e3. Tri-state buffer. A circuit which allows an input to go to output when desired Otherwise it behaves as if “nothing” is connected to the wire An equivalent technology is open-collector design Tri-state buffers can be used to design multiplexers
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d2 d1 d0 d3 e2 e1 e0 e3 Tri-state buffer • A circuit which allows an input to go to output when desired • Otherwise it behaves as if “nothing” is connected to the wire • An equivalent technology is open-collector design • Tri-state buffers can be used to design multiplexers • An example of a tri-state buffer and a 4 to one multiplexer is shown below
Keyboard LD1 M1 OpCode 4-bit Reg M U X enable enable A L U 4-bit Reg M U X LD2 M2 Sharing bus: Writing result back to registers • Output of ALU may be multiplexed with other inputs to write back • For example a keyboard input and output of ALU is shown • One of the two outputs is selected to be written back in register • Either of the registers can be loaded with data using LD signals
Designing instruction • An instruction consists of • Specification of function to be carried out • Specification of two operands • Specification of output destination • Operation code decides what output is selected by ALU • Specification of each operand is used to select correct operand sources like memory or a register • Specification of output destination is used to write the result at the correct place • Control signals are generated from an instruction to control various units • A state machine is used to control the timing of control signals