Stack, Instruction Format and Interrupt

Stack, Instruction Format and Interrupt Computer Architecture and Design Lecture 9

Stack • Store information in LIFO manner • May be either in Memory or Register Set • Need a pointer specifying top of the stack (SP: Stack Pointer) • Primary Operations • PUSH • Insert a new value at TOS (Increment SP) • POP • Remove the value from TOS (Decrement SP) • Physical Size of Stack NOT Changed

Register Stack • SP points TOS where the most recent data is located • Initially, SP = 0 meaning  no data in stack  location 0 not used • EMPTY flag denotes Stack is empty • FULL flag denotes Stack is full • DR is used to communicate with stack 63 FULL EMPTY 4 SP C 3 B 2 A 1 0 DR Stack is placed in a finite portion of registers Usually uses specially designated set of registers

Stack Operations : Push & Pop Initially, SP = 0, EMPTY = 1, FULL = 0 PUSH If ( FULL == 1 ) Error & Return // Overflow SP  SP + 1 Stack[SP]  DR EMPTY = 0 if ( (SP%Size) == 0 ) FULL = 1 POP If ( EMPTY == 1 ) Error & Return // Underflow DR  Stack[SP] SP  SP - 1 FULL = 0 if ( (SP%Size) == 0 ) EMPTY = 1

Memory Stack 1000 • Bottom of stack: 4001 • As stack grows, SP decreases • No FULL, EMPTY flags • Instead, use CPU register to hold upper/lower limits of stack and checked  before PUSH  after POP Program Instr. PC 2000 Data AR 3000 Stack SP 3999 4000 4001 DR Stack is placed in a finite portion of main memory SP is a special-purpose register

Make use of general-purpose registers For storing …  Intermediate results  Frequently used data  Recently used data More registers  Faster computation  Easy to program  More costly

Operand Address  ADD X  AC  AC + X  X may be either memory or register address  1-Address Instruction  AC-Based CPU We may need … other formats of instructions  ADD X Y  AC  X + Y or X  X + Y  2-Address Instruction  General Register-Based CPU  ADD X Y Z  X  Y + Z  3-Address Instruction  General Register-Based CPU  ADD  PUSH ( POP() + POP() )  Zero-Address Instruction  Stack-Based CPU

1-Address Format Example LOAD A // AC  M[A] ADD B // AC  AC + M[B] STORE T // M[T]  AC LOAD C // AC  M[C] ADD D // AC  AC + M[D] MUL T // AC  AC * M[T] STORE X // M[X]  AC X  (A + B) * (C + D)

2-Address Format Example LOAD R1, A // R1  M[A] ADD R1, B // R1  R1 + M[B] LOAD R2, C // R2  M[C] ADD R2, D // R2  R2 + M[D] MUL R1, R2 // R1  R1 * R2 STORE X, R1 // M[X]  R1 X  (A + B) * (C + D)

3-Address Format Example ADD R1, A, B // R1  M[A] + M[B] ADD R2, C, D // R2  M[C] + M[D] MUL X, R1, R2 // M[X]  R1 * R2 X  (A + B) * (C + D)

0-Address Format Example PUSH // Stack[++tos]  A PUSH // Stack[++tos]  B ADD // Stack[++tos]  Stack[tos--] + Stack[tos--] PUSH // Stack[++tos]  C PUSH // Stack[++tos]  D ADD // Stack[++tos]  Stack[tos--] + Stack[tos--] MUL // Stack[++tos]  Stack[tos--] * Stack[tos--] POP // M[X]  Stack[tos--] X  (A + B) * (C + D)

Interrupt • Hardware Interrupt • External Interrupt • Internal Interrupt • Software Interrupt

External Interrput • From IO devices • Requesting data transfer • Signaling end of data transfer • Timing Devices • Elapsed time of an event • Time out for infinite loops • Power Supply Monitoring Circuit • Power failure • Any other external source

Internal Interrput • Internal Interrupts (Trap) • Illegal / erroneous use of an instruction or data • Examples: • Register or Stack Overflow • Divide by Zero • Invalid Op. Code • Page or Segment fault • Differences from External Interrupts • Initiated by exceptional condition caused by user program • Synchronous to Program • When rerun, exact same interrupt at exact same place of program

Software Interrupt • External & Internal interrupts are initiated by hardware signal • Initiated by executing a user instructions that must run in supervisor mode • Examples: • system(“ls -l”) • IO instructions: printf(), scanf(), etc.

Stack, Instruction Format and Interrupt