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Activities for Inner Tracker. • Introduction • Barrel Inner Tracker (BIT) • Sensor Test • Forward Inner Tracker (FIT) • Summary. H.J. Kim 1 , H. Park 1 , D.H. Kah 1 , H.J. Hyun 1 , Y.I. Kim 1 , D.H. Shim 1 E. Won 2 , J.H. Choi 2 , H.C. Ha 2 , J.H. Han 2 , S.K. Park 2
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Activities for Inner Tracker • Introduction • Barrel Inner Tracker (BIT) • Sensor Test • Forward Inner Tracker (FIT) • Summary H.J. Kim1, H. Park1, D.H. Kah1, H.J. Hyun1, Y.I. Kim1, D.H. Shim1 E. Won2, J.H. Choi2, H.C. Ha2, J.H. Han2, S.K. Park2 J. Lee3, B.G. Cheon4 1Kyungpook Nat’l Univ., Daegu, Korea 2Korea Univ., Seoul, Korea 3Seoul Nat’l Univ., Seoul, Korea 4ChonnamNat’l Univ., Kwangju, Korea For Korean Silicon Tracker Group
(FIT and ET not shown) Vertex/Tracker in GLD TPC BIT • Barrel Inner Tracker (BIT) : • r = 90 mm (innermost), 300 mm (outermost) • half z = 185 mm (innermost), 620 mm (outermost) • 4 layers (561mm silicon equivalent thickness) • coverage: |cos| <0.9 • spatial resolution: 10 mm For Korean Silicon Tracker Group
Momentum Resolution Geant4 with single at 900 σ/pT2 (GeV)-1 TPC only TPC+VTX improve TPC+IT+VTX • Without IT: 4.4 x 10-5 (GeV)-1 (high momentum limit) • With IT: 3.9 x 10-5 (GeV)-1 For Korean Silicon Tracker Group
Number of Layers vs Resolution Geant4 with single at 900 s/pT2 (GeV)-1 2 layer 4 layer 5 layer 4 layer is probably enough For Korean Silicon Tracker Group
What else…? Outermost layer @ 37cm • Varying • -position resolution • (10mm to 20mm) • -addition at outermost layer • (at 37cm) • -silicon thickness • (561mm to 300mm) σ/pT2 (GeV)-1 4 layers 5 layers and checked the momentum resolution, but did not find significant changes So far, the current configuration seems to be good (caution: at the level of the study with single muons) For Korean Silicon Tracker Group
300 mm 230 mm 160 mm 90 mm BIT Configuration (unit : mm) 230 4 50x50 50x50 90x90 BIT 3rd layer BIT 1st layer For Korean Silicon Tracker Group
Double-sided strip position Sensor • 5 inch wafer technology • n-type substrate (high resistivity > 5 K) • DC type sensor • double metal structures on p-side • 11 masks in total Double-sided Silicon Strip Sensor P-side DSSD SSD For Korean Silicon Tracker Group
P-side N-side Prototype For Korean Silicon Tracker Group
DSSD Prototype see next slide N-side • bulk pad • readout pad • p-stop pad (punch through) • guard-ring p-stop P-side • bulk pad • readout pad • double-metal structure (hourglass pattern) • guard-ring readout pad double metal structure For Korean Silicon Tracker Group
Probe Card for Strip Measurement strip readout line connector for signal readout For Korean Silicon Tracker Group
Good results of sensors (characteristics on P-side) Guardring Strips Full depletion voltage • no failed strip • p-strip leakage current : 8~20nA/strip @ 100V • guardring current ~ 1mA @ 100V • guardring capacitance ~ 50pF @ 100V • full depletion voltage ~ 95 V Sensor Measurement For Korean Silicon Tracker Group
Sensor Signal Readout Version 1.0 hybrid board control board (spartan3) VA HV/level shift/LV generator For Korean Silicon Tracker Group
Status of Hybrid Board shift_out_b out_p : can be interpreted as pedestal w/o sensor < 10 mV (peak to peak) small spikes (due to clock?) For Korean Silicon Tracker Group
Dark box reference sensor Pb Pb sensor 90Sr source S/N Measurement Sensor for a exp. of NASA S/N = 15.6 For Korean Silicon Tracker Group
S/N Measurement Developed DSSD SSD from H company S/N = 25.0 sigma=18.8±0.16 sigma=14.4±0.2 pedestal (HAMAMATSU SSD) signal & pedestal (DSSD) For Korean Silicon Tracker Group
Forward IT Configuration TPC Version3.2 BIT • Maximum active radius : 380 • Minimum active radius : 24 • Maximum Z (active) : 1015 • Minimum Z (active) : 155 • Covering angle : 4.28 ~ 42.09 VTX • Forward IT • spatial resolution 10 mm • 7 layers (thickness 561 mm Silicon strip) For Korean Silicon Tracker Group
Momentum Resolution This plot is from a fast sim. (Kalman filter in but no Geant4) σ/pT2 (GeV)-1 single muon @ (cos=0.95) Without forward improve 4 layer option seems slightly better at low pT 4 layers only (2,4,6 removed) 7 layers Momentum resol. is better w/ FIT than w/o FIT. For Korean Silicon Tracker Group
TPC 400 380 380 380 620 300 280 BIT 230 475 210 160 330 FIT 140 90 185 76 76 66 57 47 37 32 24 Beam Pipe VTX 290 435 580 725 870 1015 155 Configuration of BIT and FIT For Korean Silicon Tracker Group
Mechanical Structure BIT support frame Ring support structure for FIT • Our design concept is that thering support structure • for FIT, thickness 2 mm, supports layers of BIT. • And strip sensors hold BIT support frame in suspense. For Korean Silicon Tracker Group
Material Budget FIT only • To optimize the position of support structure, • we have to find the structure in which • radiation length is minimum. BIT only • In a current version, the range of • the radiation length is For Korean Silicon Tracker Group
Material Budget • area in which FIT and BIT is overlapped has the maximum value of a radiation length. For Korean Silicon Tracker Group
Summary • DSSD Designed, Fabricated and Tested: - IV/CV shows good quality sensor - S/N shows that the sensors are in good shape - more tests are in progress - will fabricate AC-SSD on 6-inch(400 mm) and 8-inch(500 mm) wafers • Electronics to test sensors - built & reading out in progress (see next slide) • Simulation Study for detector configuration - 4 layers in Barrel as Inner Tracker seems reasonable - 7 layers in Forward as IT is being studied - optimization of mechanical structure is being studied - physics simulation is needed with current configuration For Korean Silicon Tracker Group
+1.5V/-2.0V +15V +40V/-40V To Power (8pin) LM360M LM360M LM360M LM360M Trig EMCO1+40V LM317 MC7805 MC7905 EMCO2-40V LM317 MC7815 To Xilinx (20pin) LM360M LM317 LM337 Analog power LM317 DS26LS32 LM317 LM337 DS26LS32 INA134 To Hybrid (50pin) VA_out cal New Power, Logic, Shift and Current Source Board • Board size: 8.5 8.5 cm2 For Korean Silicon Tracker Group