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Switched-Capacitor Boost Converter Design and Modeling for Indoor Optical Energy Harvesting with Integrated Photodiodes. Stanley W. Hsu , Erin Fong, Vipul Jain, Travis Kleeburg, Rajeevan Amirtharajah University of California, Davis. Introduction/Motivation Integrated Photodiode
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Switched-Capacitor Boost Converter Design and Modeling for Indoor Optical Energy Harvesting with Integrated Photodiodes Stanley W. Hsu, Erin Fong, Vipul Jain, Travis Kleeburg, Rajeevan Amirtharajah University of California, Davis
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Introduction • Ultra-low voltage sensor circuits powered by free-space optics (Kleeburg, 2010) • Integrated photovoltaics for optical • power, data, and clock delivery • Subcutaneous medical implants • Ultra-low duty cycle sensor (Ayazian, 2012) • Integrated photovoltaics • (2.5 mm x 2.5 mm) • Off-chip capacitive and resistive • transducers, and electrodes
Rectified AC mains at 120 Hz Energy Harvesting from Indoor Lighting • Low light intensity limits harvested energy • Issue: light flickering • Pulse-width-modulated dimming at > 200 Hz Source: ksj.mit.edu Source: www.dlsound.net
Indoor Lighting-Powered Sensor Light Cost, Area/Volume Integrated Photodiode Bypass Capacitor Power Electronics Supply ripple Circuit performance Vdd Vdd Domain Circuits
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Integrated Photodiode Designs P+/NW P+/DNW
Integrated Photodiode Results 3 P+/DNW photodidoes stacked in series (no bypass capacitor) Increasing frequency or duty cycle decreases ripple.
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Phase 2 – Charge capacitors to VIN Phase 1 – Boost output to 4x VIN Switched-Capacitor Boost Converter S4
Buck Converter Model Slow Switching Limit: Fast Switching Limit: (Seeman, 2008) Combined Output Impedance:
Proposed Boost Converter Model N=4 Model accounts for bottom plate parasitic effects and allows cascading of multiple stages
SCBC Output vs. Switching Frequency Model is accurate to within 10%, from 500 Hz to 5 MHz
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Conventional 1st Order DSM Design Comparator Digital output Analog input error Integrator Pre-Amp Latch + - 1-bit DAC
Proposed 1st Order DSM Design Removed! Digital output Analog input error Low Pass Filter Pre-Amp Latch + - 1-bit DAC
Proposed 1st Order DSM Schematic Switched-capacitor low pass filter Dynamic Comparator No pre-amplifier Attenuates input! Gain <1 1b DAC feedback
DSM Die Photo and Measured Results 1 SNDR ~27 dB
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
Sampling switch behaves as passive mixer (Cook, 2006) Distortion due to passive mixing Sampling switch Mixing between input and ripple 1b DAC feedback switch Mixing between ripple and itself Supply Ripple Effects on DSM
Measured DSM SNDR vs. Ripple ~4.5 bits Vdd = 1.4V Sampling Rate = 50 kHz Input Amplitude = -7dBVdd ~2 bits
Introduction/Motivation Integrated Photodiode Switched-Capacitor Boost Converter (SCBC) Delta-Sigma Modulator (DSM) Supply Ripple Effects on DSM Summary Outline
P+/NW integrated photodiodes achieves 557.5 µW/mm2 with Voc=523 mV Switched-capacitor boost converter model for predicting output voltage to within 10% accuracy from 500Hz to 5 MHz Supply ripple effects on passive delta-sigma modulator results in IM2 distortion at Summary
Summary Light • If DSM can tolerate an increased supply ripple from 10% to 21% of Vdd, bypass capacitor can be reduced from 56.5 nF to 3.86 nF. Integrated Photodiode Bypass Capacitor Power Electronics Vdd Vdd Domain Circuits
Texas Instruments for chip fabrication William McIntyre Arun Rao Keith Schoendoerfer Greg Winter Bijoy Chatterjee Acknowledgements