1 / 48

A Dynamic Link Allocation Router

A Dynamic Link Allocation Router. Wei Song, Doug Edwards Advanced Processor Group The University of Manchester. Overview. Network-on-a-Reconfigurable-Chip The Dynamic Link Allocation Flow control method The Dynamic Link Allocation Router (DyLAR) Conclusion. The NoRC Platform.

frederica-schulze
Download Presentation

A Dynamic Link Allocation Router

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. A Dynamic Link Allocation Router Wei Song, Doug Edwards Advanced Processor Group The University of Manchester Advanced Processor Group The School of Computer Science

  2. Overview • Network-on-a-Reconfigurable-Chip • The Dynamic Link Allocation Flow control method • The Dynamic Link Allocation Router (DyLAR) • Conclusion Advanced Processor Group The School of Computer Science

  3. The NoRC Platform • NoRC: network on a reconfigurable chip • Running multimedia applications • Connection oriented • Stochastic routing algorithm • GALS: fully asynchronous routers linked by CHAIN Advanced Processor Group The School of Computer Science

  4. Connection Oriented Routing • Flit Definitions Request Flit Other Flits Advanced Processor Group The School of Computer Science

  5. The High Retry Rate Simulation results of a 6x6 NoC with 12 functions in network. 7% Virtual Channels are required to reduce the retry rate. Advanced Processor Group The School of Computer Science

  6. Overview • Network-on-a-Reconfigurable-Chip • The Dynamic Link Allocation Flow control method • The Dynamic Link Allocation Router (DyLAR) • Conclusion Advanced Processor Group The School of Computer Science

  7. Major Design Targets • Implement some kind of virtual channels • Increase the bandwidth of CHAIN links • Reduce the area and power of the router Advanced Processor Group The School of Computer Science

  8. Increase the bandwidth Asynchronous Links work better with the lower wire count. Advanced Processor Group The School of Computer Science

  9. Increase the bandwidth Advanced Processor Group The School of Computer Science

  10. Increase the bandwidth Spatial division multiplex (SDM) is a good choice for asynchronous NoCs. Advanced Processor Group The School of Computer Science

  11. Problems of SDM Spare sub-link SDM has the low bandwidth efficiency. Advanced Processor Group The School of Computer Science

  12. Problems of SDM Advanced Processor Group The School of Computer Science

  13. Dynamic Link Allocation • Divide the sub-link allocation apart from the path reservation • Allocate idle sub-link to active communications that reserved this link • All communications fairly compete for the bandwidth Advanced Processor Group The School of Computer Science

  14. Overview • Network-on-a-Reconfigurable-Chip • The Dynamic Link Allocation Flow control method • The Dynamic Link Allocation Router (DyLAR) • Conclusion Advanced Processor Group The School of Computer Science

  15. Dynamic Link Allocation Router (DyLAR) Advanced Processor Group The School of Computer Science

  16. Path Reservation Stage Advanced Processor Group The School of Computer Science

  17. Data Transmission Stage Advanced Processor Group The School of Computer Science

  18. Head-of-line (HOL) Problem Advanced Processor Group The School of Computer Science

  19. Backpressure Advanced Processor Group The School of Computer Science

  20. Backpressure Advanced Processor Group The School of Computer Science

  21. Overview • Network-on-a-Reconfigurable-Chip • The Dynamic Link Allocation Flow control method • The Dynamic Link Allocation Router (DyLAR) • Conclusion Advanced Processor Group The School of Computer Science

  22. Conclusion • Contribution • A new flow control method • Implement the first asynchronous spatial division router • Advantages • Smaller latency under zero load • Larger overall throughput under heavy load • Smaller retry rate (smaller power consumption) • Problems • An extra request switch in each router • Extra control logic • Increase the latency to pass a router Advanced Processor Group The School of Computer Science

  23. Thank You! Questions? Advanced Processor Group The School of Computer Science

  24. Detailed Procedures • Request • Path reserved • Sending data • Release path Advanced Processor Group The School of Computer Science

  25. Request Procedure Advanced Processor Group The School of Computer Science

  26. Request Procedure Advanced Processor Group The School of Computer Science

  27. Request Procedure Advanced Processor Group The School of Computer Science

  28. Request Procedure Advanced Processor Group The School of Computer Science

  29. Request Procedure Advanced Processor Group The School of Computer Science

  30. Request Procedure Advanced Processor Group The School of Computer Science

  31. OK Ack Advanced Processor Group The School of Computer Science

  32. OK Ack Advanced Processor Group The School of Computer Science

  33. OK Ack Advanced Processor Group The School of Computer Science

  34. OK Ack Advanced Processor Group The School of Computer Science

  35. OK Ack Advanced Processor Group The School of Computer Science

  36. OK Ack Advanced Processor Group The School of Computer Science

  37. Data Flits Advanced Processor Group The School of Computer Science

  38. Data Flits Advanced Processor Group The School of Computer Science

  39. Data Flits Advanced Processor Group The School of Computer Science

  40. Data Flits Advanced Processor Group The School of Computer Science

  41. Data Flits Advanced Processor Group The School of Computer Science

  42. Data Flits Advanced Processor Group The School of Computer Science

  43. Data Flits Advanced Processor Group The School of Computer Science

  44. False Ack Advanced Processor Group The School of Computer Science

  45. False Ack Advanced Processor Group The School of Computer Science

  46. False Ack Advanced Processor Group The School of Computer Science

  47. False Ack Advanced Processor Group The School of Computer Science

  48. False Ack Advanced Processor Group The School of Computer Science

More Related