1 / 18

Chapter 5 The LC-3

Chapter 5 The LC-3. Control Instructions. Used to alter the sequence of instructions (by changing the Program Counter) Conditional Branch branch is taken if a specified condition is true signed offset is added to PC to yield new PC else, the branch is not taken

fritz
Download Presentation

Chapter 5 The LC-3

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Chapter 5The LC-3

  2. Control Instructions • Used to alter the sequence of instructions(by changing the Program Counter) • Conditional Branch • branch is taken if a specified condition is true • signed offset is added to PC to yield new PC • else, the branch is not taken • PC is not changed, points to the next sequential instruction • Unconditional Branch (or Jump) • always changes the PC • TRAP • changes PC to the address of an OS “service routine” • routine will return control to the next instruction (after TRAP)

  3. Condition Codes • LC-3 has three condition code registers:N -- negativeZ -- zeroP -- positive (greater than zero) • Set by any instruction that writes a value to a register(ADD, AND, NOT, LD, LDR, LDI, LEA) • Exactly one will be set at all times • Based on the last instruction that altered a register

  4. Branch Instruction • Branch specifies one or more condition codes. • If the set bit is specified, the branch is taken. • PC-relative addressing:target address is made by adding signed offset (IR[8:0])to current PC. • Note: PC has already been incremented by FETCH stage. • Note: Target must be within 256 words of BR instruction. • If the branch is not taken,the next sequential instruction is executed.

  5. BR (PC-Relative) What happens if bits [11:9] are all zero? All one?

  6. Example from last class: Multiply value stored in R2 by 15 • ; initialize • 0101 000 000 1 00000 ; R0 <- R0 AND 0 • 0101 001 001 1 00000 ; R1 <- R1 AND 0 • ; code to repeat • 0001 001 001 000 010 ; R1 <- R1 + R2 • 0001 000 000 1 00001 ; R0 <- R0 + 1 • ; set condition codes • 0001 011 000 1 10001 ; R3 <- R0 – 15 • ; branch if R3 < 0 because count < 15 • 0000 100 111111100 ; PC<- PC- 4 if n==1 R0 <- R0 AND 0 R1 <- R1 AND 0 R1 <- R1 + R2 R0 <- R0 + 1 R3 <- R0 -15 true R3 < 0? n==1 false

  7. Refined Example: a better way to count • ; initialize • 0101 000 000 1 00000 ; R0 <- R0 AND 0 • 0101 001 001 1 00000 ; R1 <- R1 AND 0 • 0001 000 000 1 01111 ; R0 <- R0 + 15 • ; code to repeat • 0001 001 001 000 010 ; R1 <- R1 + R2 • 0001 000 000 1 11111 ; R0 <- R0 - 1 • ; set condition codes • 0001 011 000 1 10001 ; R3 <- R0 – 15 • ; branch if R0 >0 because count < 15 • 0000 001 111111101 ; PC<- PC- 3 if p==1 R0 <- R0 AND 0 R1 <- R1 AND 0 R0 <- R0 + 15 R1 <- R1 + R2 R0 <- R0 -1 true R0 > 0? p==1 false

  8. Iterative While Loop Do-While Loop true false

  9. Multiply Using the While Loop Structure R0 <- R0 AND 0 • ; initialize • 0101 000 000 1 00000 ; R0 <- R0 AND 0 • 0101 001 001 1 00000 ; R1 <- R1 AND 0 • 0001 000 000 1 01111 ; R0 <- R0 + 15 • ; branch if R0== 0 because count == 15 • 0000 010 000000011 ; PC<- PC+3 if z==1 • ; code to repeat • 0001 001 001 000 010 ; R1 <- R1 + R2 • 0001 000 000 1 11111 ; R0 <- R0 - 1 • ; branchunconditionally • 0000 111 111111100 ; PC<- PC-4 R1 <- R1 AND 0 R0 <- R0 + 15 true R0 == 0? z==1 false R1 <- R1 + R2 R0 <- R0 -1 always true true false

  10. Code for Iteration PC offset to address C Exact bits depend on condition being tested true false Unconditional branchto retest condition PC offset toaddress A Assumes all addresses are close enough that PC-relative branch can be used.

  11. Conditional If If-Else "hammock" "diamond"

  12. If conditional Problem statement: Increment R0 if R0 < R1 WRONG??? • ; form 2s complement of R0 • 1001 000 000 111111 ; R0 <- NOT R0 • 0001 000 000 1 00001 ; R0 <- R0 + 1 • ; R3 <- R1 + complement of R0 • 0001 011 000 000 001 ; R3 <- R0 + R1 • ; branch if R3 isneg or 0 • 0000 110 000000001 ; PC<- PC+1 if z==1 • or n==1 • ; increment R0 • 0001 000 000 1 00001 ; R0 <- R0 + 1 • 1111000000100101 ; halt R0 <- NOT R0 R0 <- R0 + 1 R3 <- R0 + R1 true R3 <= 0? z==1 n==1 false R0 <- R0 +1 false

  13. Analyze the Situation • Goal: Increment R0 if R0 < R1 • R0 and R1 can each be positive or negative • So  increment R0 if (R1-R0) is positive and branch to skip that step if (R1-R0) is zero or negative when we don’t want to increment -> we do want to branch

  14. If conditional (CORRECTED) Problem statement: Increment R0 if R0 < R1 • ; form 2s complement of R0 & store in R4 • 1001 100 000 111111 ; R4<- NOT R0 • 0001 100 100 1 00001 ; R4<- R4+ 1 • ; R3 <- R1 + complement of R0 (stored in R4) • 0001 011 100 000 001 ; R3 <- R4+ R1 • ; branch if R3 isneg or 0 • 0000 110 000000001 ; PC<- PC+1 if z==1 • or n==1 • ; increment R0 • 0001 000 000 1 00001 ; R0 <- R0 + 1 • 1111000000100101 ; halt R0 <- NOT R0 R0 <- R0 + 1 R3 <- R0 + R1 true R3 <= 0? z==1 n==1 false R0 <- R0 +1 false

  15. Code for Conditional PC offset toaddress C Exact bits depend on condition being tested Unconditional branchto Next Subtask PC offset toaddress D Assumes all addresses are close enough that PC-relative branch can be used.

  16. JMP (Register) • Jump is an unconditional branch -- always taken. • Target address is the contents of a register. • Allows any target address.

  17. TRAP • Calls a service routine, identified by 8-bit “trap vector.” • When routine is done, PC is set to the instruction following TRAP. • (We’ll talk about how this works later.) Warning: TRAP changes R7.

More Related