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Standard Cell Approach to 3D Interconnect Crosstalk Modeling

Standard Cell Approach to 3D Interconnect Crosstalk Modeling. Dr. A.A. Ilumoka Associate Professor, University of Hartford, CT, USA Visiting Prof, Georgia Institute of Technology ,USA Visiting Prof, Imperial College, London. Interconnect Effects. Crosstalk. Logic Hazards. Delay.

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Standard Cell Approach to 3D Interconnect Crosstalk Modeling

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  1. Standard Cell Approach to 3D Interconnect Crosstalk Modeling Dr. A.A. IlumokaAssociate Professor, University of Hartford, CT, USAVisiting Prof, Georgia Institute of Technology ,USAVisiting Prof, Imperial College, London

  2. Interconnect Effects Crosstalk Logic Hazards Delay Poor Signal Integrity Interconnect is 70% chip area

  3. Major Issues in Nanoscale VLSI Design • Interconnect Coupling Noise • Low Power Design • Wafer Scale Integration • Thermal Modelling • Hardware/Software Co-Design

  4. Interconnect Effects • Delay - due to self parasitic effects. Accounts for up to 70% of clock cycle time in dense high-speed circuits • Crosstalk - due to mutual parasitic effects. Electromagnetic coupling between signal paths

  5. Delay Noise • Extensive work • Well characterised • Elmore Delay equations • Passive Multi-port models • ED A tools

  6. Interconnect Modelling • Several approaches reported: • Distributed model for lossy Tx Lines (Frye & Chen) • Simplified Pole/Zero Descriptions of circuit behaviour (Brews) • Graph-based approaches - risk graphs generated for each region (Xue, Kuh & Wang) • Reduced-Order Modelling Techniques (Feldman, Kamon, White)

  7. Problems with Interconnect Modelling • Difficulty Modelling 3D Effects • Difficulty modelling effect of several non-correlated variables( wire geometry, insulating medium properties) • Lack of re-usability - need to recalculate models for changes in interconnect

  8. Example-based Learning AI to the rescue Neural Networks • Map set of Inputs to set of Outputs • Many network formulations • General form: f(x)= Σ ci Gi(x,W)

  9. Neural Nets • f(x) = Σ ci Gi (x ,W) (sum over i) • x = (x1, x2, x3,…….) are inputs • f(x) is output: weighted sum of activation functions Gi • W : weights which parameterize Gi • c: coefficients which modify Gi

  10. Types of ANN’s • Many network formulations depending on problem type • SLP: if Gi are sigmoids, suitable for low dim problems • MLP: if f(x) applied as input to another net, more cx problems • Radial Basis - if Gi are Gaussian, suitable for classification problems

  11. Modular Artificial Neural Network (MANN) • All animal brains exhibit some degree of regional specialisation wrt function • Specific parts of the human brain are known to have certain functions e.g. sleep control, memory etc • Certain neural nets called MANN’s function in analogous way

  12. MANN • Jacobs, Nowlan and Hinton, (MIT) 1991 • Group of sub nets called local experts competing to learn different aspects of a problem • Competitive learning controlled by a gating network • Useful for high dim problems with input data space stratification

  13. MANN Architecture

  14. MANN Probabilistic Weight Update • Training is by back-propagation of error • Update of LE weights posed as a max likelihood problem • Initially gating net outputs mixture of LE outputs • As learning progresses, gate net tends to select one LE for each region of input space • Learning rule - gate net learns by matching prior and posterior probabilities that LE was responsible for current output vector

  15. Interconnect Building Blocks - Wirecells

  16. Wirecell Circuit Extraction Electrically characterise 3D conducting structures via 3-step process : FEM Finite Element Method EM Field Simulation Circuit Parameter Extraction

  17. Parameterized MANN Models • For each interconnect wirecell • Generate Monte Carlo Database for Training and Testing MANN • Store final MANN model in library Wirecell

  18. Standard Wirecells Chip Interconnect Wirecells

  19. MANN-Based Standard Wirecell Approach MANN Wirecell Models Chip Interconnect

  20. Advantages of MANN-Based Approach • Simultaneous modelling of several non-correlated interconnect variables • Can handle 3D systems of multiple conductors • Computationally efficient due to wirecell re-usability

  21. Results for some CMOS Circuits • Ring Oscillator • Operational Transconductance Amplifier • Combinational Logic Circuit

  22. Ring Oscillator Circuit

  23. Ring Oscillator Results

  24. Ring Osc Layout showing isocouples

  25. Operational Transconductance Amp

  26. OTA DC Transfer Characteristic

  27. Effect of Crosstalk on DC Gain

  28. OTA Isocouples: Contours of Equi-coupling

  29. CMOS COMB LOGIC

  30. Crosstalk in Comb Logic Circuit

  31. Conclusions & Future Research • Efficient method presented for MANN-based standard cell approach to interconnect delay & crosstalk prediction • Contours of equi-coupling - isocouples - derived to guide layout • Future research - develop reverse neural net mapping for automated crosstalk minimization by manipulation of interconnect geometry and material properties

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