1 / 34

EE121 John Wakerly Lecture #6

EE121 John Wakerly Lecture #6. Adders Multipliers Read-Only Memories Barrel-Shifter Design Example. 4-bit comparator. EQ_L. Equality Comparators. 1-bit comparator. 8-bit Magnitude Comparator. Other conditions. Comparators in ABEL. Equality checking PEQQ = ([P7..P0] == [Q7..Q0]);

gafna
Download Presentation

EE121 John Wakerly Lecture #6

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. EE121 John Wakerly Lecture #6 Adders Multipliers Read-Only Memories Barrel-Shifter Design Example

  2. 4-bit comparator EQ_L Equality Comparators • 1-bit comparator

  3. 8-bit Magnitude Comparator

  4. Other conditions

  5. Comparators in ABEL • Equality checking • PEQQ = ([P7..P0] == [Q7..Q0]); • PEQQ_L = !([P7..P0] == [Q7..Q0]); • 16 product terms • Magnitude comparison • PGTQ = ([P7..P0] > [Q7..Q0]); • PGTQ_L = !([P7..P0] > [Q7..Q0]); • 255 product terms (try it in Foundation!)

  6. X Y Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Adders • Basic building block is “full adder” • 1-bit-wide adder, produces sum and carry outputs • Truth table:

  7. Full-adder circuit

  8. Ripple adder • Speed limited by carry chain • Faster adders eliminate or limit carry chain • 2-level AND-OR logic ==> 2n product terms • 3 or 4 levels of logic, carry lookahead

  9. 74x2834-bit adder • Uses carry lookahead internally

  10. “generate” “half sum” carry-in from previous stage “propagate”

  11. Ripple carry between groups

  12. Lookahead carry between groups

  13. Addition in ABEL • Easy? • No -- huge number of product terms! • On the order of 2n for bit n • @CARRY directive

  14. Subtraction • Subtraction is the same as addition of the two’s complement. • The two’s complement is the bit-by-bit complement plus 1. • Therefore, X – Y = X + Y + 1 . • Complement Y inputs to adder, set Cin to 1. • For a borrow, set Cin to 0.

  15. Full subtractor = full adder, almost

  16. Multipliers • 8x8 multiplier

  17. 4x4 multiplier in ABEL

  18. Full-adder array

  19. Faster carry chain

  20. Read-Only Memories

  21. Why “ROM”? • Program storage • Boot ROM for personal computers • Complete application storage for embedded systems. • Actually, a ROM is a combinational circuit, basically a truth-table lookup. • Can perform any combinational logic function • Address inputs = function inputs • Data outputs = function outputs

  22. Logic-in-ROM example

  23. 4x4 multiplier example

  24. Internal ROM structure PDP-11 boot ROM (64 words, 1024 diodes)

  25. Two-dimensional decoding ?

  26. Larger example, 32Kx8 ROM

  27. Today’s ROMs • 256K bytes, 1M byte, or larger • Use MOS transistors

  28. EEPROMs, Flash PROMs • Programmable and erasableusing floating-gate MOS transistors

  29. Typical commercial EEPROMs

  30. EEPROM programming • Apply a higher voltage to force bit change • E.g., VPP = 12 V • On-chip high-voltage “charge pump” in newer chips • Erase bits • Byte-byte • Entire chip (“flash”) • One block (typically 32K - 66K bytes) at a time • Programming and erasing are a lot slower than reading (milliseconds vs. 10’s of nanoseconds)

  31. Microprocessor EPROM application

  32. ROM control and I/O signals

  33. ROM timing

  34. Next time • Sequential circuits (Chapter 7)

More Related