Zero-voltage transition converters The phase-shifted full bridge converter

1. Zero-voltage transition convertersThe phase-shifted full bridge converter Buck-derived full-bridge converter Zero-voltage switching of each half-bridge section Each half-bridge produces a square wave voltage. Phase-shifted control of converter output A popular converter for server front-end power systems Efficiencies of 90% to 95% regularly attained Controller chips available

2. Actual waveforms, including resonant transitions

3. Issues with this converter It’s a good converter for many applications requiring isolation. But… • Secondary-side diodes operate with zero-current switching. They require snubbing or other protection to avoid failure associated with avalanche breakdown • The resonant transitions reduce the effective duty cycle and conversion ratio. To compensate, the transformer turns ratio must be increased, leading to increased reflected load current in the primary-side elements • During the D’Ts interval when both output diodes conduct, inductor Lc stores energy (needed for ZVS to initiate the next DTs interval) and its current circulates around the primary-side elements—causing conduction loss

4. Result of analysisBasic configuration: full bridge ZVT • Phase shift  assumes the role of duty cycle d in converter equations • Effective duty cycle is reduced by the resonant transition intervals • Reduction in effective duty cycle can be expressed as a function of the form FPZVT(J), where PZVT(J) is a negative number similar in magnitude to 1. F is generally pretty small, so that the resonant transitions do not require a substantial fraction of the switching period • Circuit looks symmetrical, but the control, and hence the operation, isn’t. One side of bridge loses ZVS before the other.

5. Effect of ZVT: reduction of effective duty cycle

6. Phase-shifted control • Approximate waveforms and results • (as predicted by analysis of the parent hard-switched converter)

7. Diode switching analysis

8. Diode commutation: intervals 3 and 4

9. Waveforms: ZCS of D6

10. Approaches to snub the diode ringing(a) conventional diode snubber

11. Approaches to snub the diode ringing(b) conventional passive voltage-clamp snubber

12. Approaches to snub the diode ringing(c) simplify to one passive voltage-clamp snubber

13. Approaches to snub the diode ringing(d) improvement of efficiency in voltage-clamp snubber

14. Approaches to snub the diode ringing(e) active clamp lossless snubber

15. Approaches to snub the diode ringing(f) primary-side lossless voltage clamp

16. PFC DC-DC Load Load Load Another application of the ZVT: DC Transformer Operate at a fixed conversion ratio with high duty cycle, leading to high efficiency—avoids the problems of circulating currents Use other elements in the system to regulate voltage 5 V 1 V 350 V ZVT AC line DC-DC isolation DC-DC

17. Active clamp circuits • Can be viewed as a lossless voltage-clamp snubber that employs a current-bidirectional switch • See Vinciarelli patent (1982) for use in forward converter • Related to other half-bridge ZVS circuits • Can be added to the transistor in any PWM converter • Not only adds ZVS to forward converter, but also resets transformer better, leading to better transistor utilization than conventional reset circuit

18. The conventional forward converter • Max vds = 2Vg + ringing • Limited to D < 0.5 • On-state transistor current is P/DVg • Magnetizing current must operate in DCM • Peak transistor voltage occurs during transformer reset • Could reset the transformer with less voltage if interval 3 were reduced

19. The active-clamp forward converter • Better transistor/transformer utilization • ZVS • Not limited to D < 0.5 Transistors are driven in usual half-bridge manner:

20. Approximate analysis:ignore resonant transitions, dead times, and resonant elements

21. Charge balance Vb can be viewed as a flyback converter output. By use of a current-bidirectional switch, there is no DCM, and LM operates in CCM.

22. Peak transistor voltage Max vds = Vg + Vb = Vg /D’ which is less than the conventional value of 2 Vg when D > 0.5 This can be used to considerable advantage in practical applications where there is a specified range of Vg

23. Design example • 270 V ≤ Vg ≤ 350 V • max Pload = P = 200 W • Compare designs using conventional 1:1 reset winding and using active clamp circuit

24. Conventional case Peak vds = 2Vg + ringing = 700 V + ringing Let’s let max D = 0.5 (at Vg = 270 V), which is optimistic Then min D (at Vg = 350 V) is(0.5)(270)/(350) = 0.3857 The on-state transistor current, neglecting ripple, is given by ig  = DnI = Did-on with P = 200 W = Vg  ig  = DVg id-on So id-on = P/DVg = (200W) / (0.5)(270 V) = 1.5 A

25. Active clamp case:scenario #1 • Suppose we choose the same turns ratio as in the conventional design. Then the converter operates with the same range of duty cycles, and the on-state transistor current is the same. But the transistor voltage is equal to Vg /D’, and is reduced: • At Vg = 270 V: D = 0.5 peak vds = 540 V • At Vg = 350 V: D = 0.3857 peak vds = 570 V • which is considerably less than 700 V

26. Active clamp case:scenario #2 • Suppose we operate at a higher duty cycle, say, D = 0.5 at Vg = 350 V. Then the transistor voltage is equal to Vg /D’, and is similar to the conventional design under worst-case conditions: • At Vg = 270 V: D = 0.648 peak vds = 767 V • At Vg = 350 V: D = 0.5 peak vds = 700 V • But we can use a lower turns ratio that leads to lower reflected current in Q1: • id-on = P/DVg = (200W) / (0.5)(350 V) = 1.15 A