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Development of a primitive computer. Following: “ A synthesis approach to a computer architecture lecture ” by F.M. Cady , IEEE Trans. On Education, Vol E-23, No. 1, pp. 22-28, Feb. 1980. Daniel Tabak Francisco F. Rivera. A. Instruction Set. A. Instruction Set (cont.).
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Development of a primitive computer Following: “A synthesis approach to a computer architecture lecture” by F.M. Cady, IEEE Trans. On Education, Vol E-23, No. 1, pp. 22-28, Feb. 1980. Daniel Tabak Francisco F. Rivera
D. MOV Instruction MOV B (A)
E. Output Operation IN 01 101 01 OUT 10 111 01
F. A Program to Add Two Operands IN 1; A (dev. 01) MOV; B (A) IN 1; A (dev. 01) ADD; A (A)+(B) OUT 2; dev. 10 (A)
I. Instruction Register (IR) and Decoder IR: Instruction Register DR: Data Register
J. Memory Address Register (MAR) MAR: Memory Address Register
K. Program Counter PC: Program Counter
P. A More Versatile MOV Instruction MOV B,A; B (A) 010 01 00 MOV A,B; A (B) 010 00 01
Q. Immediate MVI A, dato; 110 00 dato Example: MVI A,65; 110 000 00 01000001
R. A JUMP Instruction (JMP) JMP addr; 000 addr Example: 000 00000 01010000 10110001 Target address
S. A Condicional JUMP JMP cond addr; 000 addr Condition Example: 000 01 000 01010000 10110001 Target address